GAL20V8 Lattice Semiconductor, GAL20V8 Datasheet
GAL20V8
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GAL20V8 Summary of contents
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... Output Logic Macrocell (OLMC configured by the user. An important subset of the many architecture configura- tions possible with the GAL20V8 are the PAL architectures listed in the table of the macrocell description section. GAL20V8 devices are capable of emulating any of these PAL architectures with full function/fuse map/parametric compatibility ...
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... GAL20V8 Ordering Information Commercial Grade Specifications Industrial Grade Specifications ...
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... The following is a list of the PAL architectures that the GAL20V8 can emulate. It also shows the OLMC mode under which the devices emulate the PAL architecture. ...
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... XOR OE XOR Note: The development software configures all of the architecture control bits and checks for proper pin usage automatically. Specifications GAL20V8 Dedicated input or output functions can be implemented as sub- sets of the I/O function. Registered outputs have eight product terms per output. I/Os have seven product terms per output. ...
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... DIP (PLCC) Package Pinouts 2640 PTD 2703 5 Specifications GAL20V8 23(27) OLMC 22(26) XOR-2560 AC1-2632 OLMC 21(25) XOR-2561 AC1-2633 OLMC 20(24) XOR-2562 AC1-2634 OLMC 19(23) XOR-2563 AC1-2635 OLMC 18(21) XOR-2564 AC1-2636 OLMC 17(20) XOR-2565 AC1-2637 OLMC 16(19) XOR-2566 ...
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... De- XOR XOR Note: The development software configures all of the architecture control bits and checks for proper pin usage automatically. Specifications GAL20V8 signs requiring eight I/Os can be implemented in the Registered mode. All macrocells have seven product terms per output. One product term is used for programmable output enable control ...
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... DIP (PLCC) Package Pinouts Specifications GAL20V8 2640 PTD 23(27) OLMC 22(26) XOR-2560 AC1-2632 OLMC 21(25) XOR-2561 AC1-2633 OLMC 20(24) XOR-2562 AC1-2634 OLMC 19(23) XOR-2563 AC1-2635 OLMC 18(21) XOR-2564 AC1-2636 OLMC 17(20) XOR-2565 AC1-2637 ...
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... AC1=0 defines this configuration. - Pins 18 & 19 are permanently configured to this function. Dedicated Input Configuration for Simple Mode - SYN=1. - AC0=0. - XOR=0 defines Active Low Output. - XOR=1 defines Active High Output. - AC1=1 defines this configuration. - All OLMC except pins 18 & 19 can be configured to this function. 8 Specifications GAL20V8 ...
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... DIP (PLCC) Package Pinouts 2640 PTD 2703 9 Specifications GAL20V8 23(27) OLMC XOR-2560 22(26) AC1-2632 OLMC XOR-2561 21(25) AC1-2633 OLMC XOR-2562 20(24) AC1-2634 OLMC XOR-2563 19(23) AC1-2635 OLMC XOR-2564 18(21) AC1-2636 OLMC XOR-2565 17(20) AC1-2637 OLMC XOR-2566 ...
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... MAX. Vin = 0.5V CC OUT = 0. 3. 15MHz Outputs Open = 0. 3. 15MHz Outputs Open = Specifications GAL20V8C Specifications GAL20V8 ) ............................... ........................... – MIN. TYP. 3 — Vss – 0.5 2.0 — — — — — — — 2.4 — ...
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... SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O *Characterized but not 100% tested Specifications GAL20V8C Over Recommended Operating Conditions 8 outputs switching 1 output switching MAXIMUM* UNITS Specifications GAL20V8 COM/IND COM COM -5 -7 -10 MIN. MAX. MIN. MAX. MIN. MAX 7 — — — ...
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... MAX. Vin = 0.5V CC OUT = 0. 3. 15MHz Outputs Open = 0. 3. 15MHz Outputs Open = Specifications GAL20V8B Specifications GAL20V8 ) ............................... ........................... – MIN. TYP. — Vss – 0.5 2.0 — — — — — — — ...
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... MAXIMUM Specifications GAL20V8B Specifications GAL20V8 COM / IND IND COM / IND -10 -15 -20 -25 MAX. MIN. MAX. MIN. MAX. MIN — — — — — — ...
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... Clock Width INPUT or I/O FEEDBACK CLK VALID INPUT REGISTERED t pd OUTPUT REGISTERED OUTPUT t wl CLK REGISTERED FEEDBACK 14 Specifications GAL20V8 VALID INPUT max (external fdbk) Registered Output t t dis Output Enable/Disable f 1/ max (internal fdbk ...
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... For example, the timing from clock to a combinatorial output is equal to tcf + tpd. GND to 3.0V 2 – 3ns 10% – 90% 1.5ns 10% – 90% FROM OUTPUT (O/Q) 1.5V UNDER TEST 1.5V See Figure GAL20V8C Output Load Conditions (see figure Test Condition 2 L 390 50pF A 390 ...
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... NOTE: The electronic signature is included in checksum calcula- tions. Changing the electronic signature will alter the checksum. Security Cell A security cell is provided in the GAL20V8 devices to prevent un- authorized copying of the array patterns. Once programmed, this cell prevents further read access to the functional bits in the device. ...
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... Power-Up Reset INTERNAL REGISTER Q - OUTPUT FEEDBACK/EXTERNAL OUTPUT REGISTER Circuitry within the GAL20V8 provides a reset signal to all registers during power-up. All internal registers will have their Q outputs set t low after a specified time ( pr MAX result, the state on the registered output pins (if they are enabled) will always be high on power-up, regardless of the programmed polarity of the output pins ...
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... GAL20V8C: Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 PT H->L 1.2 PT L->H 1.1 1 0.9 0.8 0.7 Temperature (deg. C) Delta Tpd Outputs 0 -0.25 -0.5 -0. Number of Outputs Switching Delta Tpd vs Output Loading 8 RISE 6 FALL 100 Output Loading (pF) Normalized Tco vs Vcc 1 ...
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... GAL20V8C: Typical AC and DC Characteristic Diagrams Vol vs Iol 2 1.5 1 0.5 0 0.00 20.00 40.00 60.00 Iol (mA) Normalized Icc vs Vcc 1.20 1.10 1.00 0.90 0.80 4.50 4.75 5.00 5.25 Supply Voltage (V) Delta Icc vs Vin (1 input 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 Vin (V) Voh vs Ioh 0.00 10.00 20.00 30.00 40.00 80.00 Ioh(mA) Normalized Icc vs Temp 1.3 1.2 1.1 1 0.9 0.8 5.50 -55 - Temperature (deg. C) Input Clamp (Vik ...
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... GAL20V8B-7/-10: Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 PT H->L 1.2 PT L->H 1.1 1 0.9 0.8 0.7 Temperature (deg. C) Delta Tpd Outputs 0 -0 Number of Outputs Switching Delta Tpd vs Output Loading Normalized Tco vs Vcc 1.2 RISE 1.1 FALL 1 0.9 0.8 4.50 4.75 5.00 5.25 Supply Voltage (V) Normalized Tco vs Temp 1 ...
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... GAL20V8B-7/-10: Typical AC and DC Characteristic Diagrams Vol vs Iol 1 0.75 0.5 0.25 0 0.00 20.00 40.00 60.00 80.00 100.00 Iol (mA) Normalized Icc vs Vcc 1.20 1.10 1.00 0.90 0.80 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Delta Icc vs Vin (1 input 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 Vin (V) Specifications GAL20V8 Voh vs Ioh 0.00 10.00 20.00 30.00 40.00 50.00 60.00 Ioh(mA) Normalized Icc vs Temp 1.2 1.1 1 0.9 0.8 -55 - 100 125 Temperature (deg. C) ...
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... GAL20V8B-15/-25: Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Normalized Tpd vs Temp 1.3 PT H->L 1.2 PT L->H 1.1 1 0.9 0.8 0.7 -55 - 100 125 Temperature (deg. C) Delta Tpd Outputs 0 -0 Number of Outputs Switching Delta Tpd vs Output Loading Output Loading (pF) Normalized Tco vs Vcc 1 ...
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... GAL20V8B-15/-25: Typical AC and DC Characteristic Diagrams Vol vs Iol 2 1.5 1 0.5 0 0.00 20.00 40.00 60.00 80.00 100.00 Iol (mA) Normalized Icc vs Vcc 1.20 1.10 1.00 0.90 0.80 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Delta Icc vs Vin (1 input 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 Vin (V) Specifications GAL20V8 Voh vs Ioh 0.00 10.00 20.00 30.00 40.00 50.00 60.00 Ioh(mA) Normalized Icc vs Temp 1.2 1.1 1 0.9 0.8 -55 - 100 125 Temperature (deg. C) ...