A29040 AMIC Technology, A29040 Datasheet - Page 11

• Manufacturer Part Number: A29040
• Description: 512K X 8 Bit CMOS 5.0 Volt-only/ Uniform Sector Flash Memory
• Manufacturer: AMIC Technology

Write Operation Status
Several bits, I/O
A29040A to determine the status of a write operation. Table 5
and the following subsections describe the functions of these
status bits. I/O
determining whether a program or erase operation is complete
or in progress. These three bits are discussed first.
I/O
The
whether an Embedded Algorithm is in progress or completed,
or whether the device is in Erase Suspend.
valid after the rising edge of the final
or erase command sequence.
During the Embedded Program algorithm, the device outputs
on I/O
I/O
When the Embedded Program algorithm is complete, the
device outputs the datum programmed to I/O
must provide the program address to read valid status
information on I/O
protected sector,
approximately 2 s, then the device returns to reading array
data.
During the Embedded Erase algorithm,
a "0" on I/O
complete, or if the device enters the Erase Suspend mode,
complement/true datum output described for the Embedded
Program algorithm: the erase function changes all the bits in a
sector to "1"; prior to this, the device outputs the
"complement," or "0." The system must provide an address
within any of the sectors selected for erasure to read valid
status information on I/O
After an erase command sequence is written, if all sectors
selected for erasing are protected,
active for approximately 100 s, then the device returns to
reading array data. If not all selected sectors are protected, the
Embedded Erase algorithm erases the unprotected sectors,
and ignores the selected sectors that are protected.
When the system detects I/O
complement to true data, it can read valid data at I/O
the following read cycles. This is because I/O
asynchronously with I/O
asserted low. The
Algorithms) figure in the "AC Characteristics" section illustrates
this. Table 5 shows the outputs for
Figure 3 shows the
PRELIMINARY
Data
7
7
: Data Polling
status also applies to programming during Erase Suspend.
Data
7
Polling produces a "1" on I/O
the complement of the datum programmed to I/O
Polling bit, I/O
7
. When the Embedded Erase algorithm is
2
7
, I/O
, I/O
(August, 2001, Version 0.1)
Data
7
Data
Data
. If a program address falls within a
3
, I/O
6
7
0
and I/O
.
Polling algorithm.
- I/O
Polling Timings (During Embedded
5
, I/O
Polling on I/O
7
, indicates to the host system
6
6
, and I/O
while Output Enable (
2
7
each offer a method for
7
has changed from the
WE
.This is analogous to the
Data
Data
Data
7,
pulse in the program
are provided in the
Polling on I/O
7
Polling produces
Polling on I/O
Data
7
is active for
7
. The system
may change
7
Polling is
- I/O
OE
7
. This
0
7
) is
on
is
11
7
.
Note :
1. VA = Valid address for programming. During a sector
2. I/O
erase operation, a valid address is an address within any
sector selected for erasure. During chip erase, a valid
address is any non-protected sector address.
I/O
No
7
7
should be rechecked even if I/O
may change simultaneously with I/O
Figure 3. Data Polling Algorithm
Read I/O
Read I/O
Address = VA
Address = VA
I/O
I/O
I/O
START
7
7
FAIL
AMIC Technology, Inc.
= Data ?
= Data ?
5
= 1?
7
7
-I/O
Yes
- I/O
No
No
A29040A Series
0
0
5
= "1" because
Yes
Yes
5
.
PASS