A29L400 AMIC Technology, A29L400 Datasheet

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A29L400

Manufacturer Part Number
A29L400
Description
512K X 8 Bit / 256K X 16 Bit CMOS 3.0 Volt-only/ Boot Sector Flash Memory
Manufacturer
AMIC Technology
Datasheet

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Preliminary
Features
n Single power supply operation
n Access times:
n Current:
n Flexible sector architecture
n Extended operating temperature range: -45 C ~ +85 C
n Unlock Bypass Program Command
n Top or bottom boot block configurations available
n Embedded Algorithms
PRELIMINARY
- Embedded Program algorithm automatically writes
- 200 nA typical CMOS standby
- 200 nA Automatic Sleep Mode current
- 16 Kbyte/ 8 KbyteX2/ 32 Kbyte/ 64 KbyteX7 sectors
- 8 Kword/ 4 KwordX2/ 16 Kword/ 32 KwordX7 sectors
- Any combination of sectors can be erased
- Supports full chip erase
- Sector protection:
for –U series
- Full voltage range: 2.7 to 3.6 volt read and write
- Regulated voltage range: 3.0 to 3.6 volt read and write
- 70/90 (max.)
- 4 mA typical active read current
- 20 mA typical program/erase current
- Reduces overall programming time when issuing
- Embedded Erase algorithm will automatically erase
operations for battery-powered applications
operations for compatibility with high performance 3.3
volt microprocessors
A hardware method of protecting sectors to prevent
any inadvertent program or erase operations within
that sector. Temporary Sector Unprotect feature
allows code changes in previously locked sectors
multiple program command sequence
the entire chip or any combination of designated
sectors and verify the erased sectors
and verifies data at specified addresses
(October, 2002, Version 0.2)
512K X 8 Bit / 256K X 16 Bit CMOS 3.0 Volt-only,
1
n Typical 100,000 program/erase cycles per sector
n 20-year data retention at 125 C
n Compatible with JEDEC-standards
n
n Ready /
n Erase Suspend/Erase Resume
n Hardware reset pin (
n Package options
- Reliable operation for the life of the system
- Pinout and software compatible with single-power-
- Superior inadvertent write protection
- Provides a software method of detecting completion
- Provides a hardware method of detecting completion
- Suspends a sector erase operation to read data from,
- Hardware method to reset the device to reading array
- 44-pin SOP or 48-pin TSOP (I) or 48-ball TFBGA
Data
supply Flash memory standard
of program or erase operations (not available on 44-
pin SOP)
data
of program or erase operations
or program data to, a non-erasing sector, then
resumes the erase operation
Polling and toggle bits
Boot Sector Flash Memory
BUSY
pin (RY /
A29L400 Series
RESET
AMIC Technology, Inc.
BY
)
)

Related parts for A29L400

A29L400 Summary of contents

Page 1

... Suspends a sector erase operation to read data from, or program data to, a non-erasing sector, then resumes the erase operation n Hardware reset pin ( - Hardware method to reset the device to reading array data n Package options - 44-pin SOP or 48-pin TSOP (I) or 48-ball TFBGA 1 A29L400 Series pin ( RESET ) AMIC Technology, Inc. ...

Page 2

... Erase Suspend. Besides the I/O A29L400 has a second toggle bit, I/O the addressed sector is being selected for erase. The A29L400 also offers the ability to program in the Erase Suspend mode. The standard A29L400 offers access times of 70 and 90ns, allowing high-speed microprocessors to operate without wait states ...

Page 3

... BYTE A10 A11 I/O I I/O I I/O I I/O I A29L400 Series 48 A16 47 BYTE 46 VSS 45 I/O ( VCC ...

Page 4

... Output Enable OE Hardware Reset Selects Byte Mode or Word Mode BYTE RY/ BY Ready/ BUSY - Output VSS Ground VCC Power Supply NC Pin not connected internally 4 A29L400 Series I Input/Output Buffers Chip Enable STB Data Latch Logic Y-Decoder Y-Gating X-decoder Cell Matrix AMIC Technology, Inc. (A-1) ...

Page 5

... The appropriate device bus operations table lists the inputs and control levels required, and the resulting output. The following subsections describe each of these operations in further detail. Table 1. A29L400 Device Bus Operations A0 – A17 OE WE RESET ...

Page 6

... Standard address access timings provide new data when addresses are changed. While in sleep mode, output data is latched and always available to the system. I the automatic sleep mode current specification. 6 A29L400 Series - I Standard read cycle timings and I 0 0.3V. (Note that this ...

Page 7

... Embedded Algorithms). The system can read data t the RESET pin return to V Refer to the AC Characteristics tables for RESET parameters and diagram. but IL 7 A29L400 Series (during READY BY pin is “1”), the reset (not during READY after RH ...

Page 8

... Table 2. A29L400 Top Boot Block Sector Address Table Sector A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 Table 3. A29L400 Bottom Boot Block Sector Address Table ...

Page 9

... Table 4. A29L400 Autoselect Codes (High Voltage Method) Description Mode CE Manufacturer ID: AMIC L Device ID: Word A29L400 L Byte (Top Boot Block) Device ID: Word A29L400 L Byte (Bottom Boot Block) Continuation ID L Sector Protection Verification L L=Logic Low H=Logic High Note: The autoselect codes may also be accessed in-system via command sequences. ...

Page 10

... and is a logical one. during power up, the IH 10 A29L400 Series is removed from the RESET pin, all the previously ID START RESET = V ID (Note 1) Perform Erase or Program Operations RESET = V IH Temporary Sector Unprotect Completed (Note 2) Notes: 1. All protected sectors unprotected. ...

Page 11

... Reset PLSCNT=1 Increment PLSCNT No PLSCNT= Yes 1000? Yes Device failed Sector Unprotect Algorithm 11 A29L400 Series START PLSCNT=1 RESET=V ID Wait First Write Temporary Sector Cycle=60h? Unprotect Mode Yes All sectors protected? Yes ...

Page 12

... Data Polling algorithm to indicate the operation was successful. However, a succeeding read will show that the data is still “0”. Only erase operations can convert a “0” “1”. 12 A29L400 Series on address bit A9. ID generated program pulses ...

Page 13

... The time between these additional cycles must be less than 50 s, otherwise the last address and command might not be accepted, and erasure may begin recommended that processor interrupts be disabled during this time to ensure all commands are accepted. The interrupts 13 A29L400 Series , I I/O . See AMIC Technology, Inc ...

Page 14

... I and I/O together Note : 1. See the appropriate Command Definitions table for erase command sequences. 2. See "I/O 14 A29L400 Series or I/O status bits, just as in the 7 6 START Write Erase Command Sequence Data Poll from System No Data = FFh ? Yes Erasure Completed : Sector Erase Timer" ...

Page 15

... PD = Data to be programmed at location PA. Data latches on the rising edge Address of the sector to be verified (in autoselect mode) or erased. Address bits A17 - A12 select a unique sector. PRELIMINARY (October, 2002, Version 0.2) Table 5. A29L400 Command Definitions Bus Cycles (Notes First Second Third ...

Page 16

... The Unlock Bypass Reset command is required to return to reading array data when the device is in the unlock bypass mode. 12. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode. 13. The Erase Resume command is valid only during the Erase Suspend mode. PRELIMINARY (October, 2002, Version 0.2) A29L400 Series AMIC Technology, Inc. 16 goes high 5 ...

Page 17

... Several bits, I/O , I/O , I/O , I the A29L400 to determine the status of a write operation. Table 6 and the following subsections describe the functions of these status bits. I/O , I/O 7 offer a method for determining whether a program or erase operation is complete or in progress. These three bits are discussed first. I/O : Data Polling ...

Page 18

... Figure 6). vs. 2 and I Toggle Bit 2 18 A29L400 Series , when used with I pulse in the command control the read cannot distinguish whether the sector and I/O ...

Page 19

... Table 6 shows the outputs for I/O PRELIMINARY (October, 2002, Version 0. Data Polling I/O is "1", the "0", the device will 3 is high on the A29L400 Series START Read I/O -I Read I/O -I (Note 1) No Toggle Bit = Toggle ? Yes No I ...

Page 20

... Version 0.2) Table 6. Write Operation Status I/O I (Note 1) (Note 2) Toggle I Toggle 1 No toggle Data Data Toggle I/O 7 20ns 20ns 20ns 20ns 20ns 20ns 20 A29L400 Series I/O I/O I RY/ (Note 1) 0 N/A No toggle 0 1 Toggle 0 N/A Toggle Data Data Data 0 N/A N/A AMIC Technology, Inc ...

Page 21

... VCC 0.3V IH RESET = VSS 0. VCC 0.3V VSS 0. VCC = 3 4.0mA, VCC = VCC Min -2.0 mA, VCC = VCC Min -100 A, VCC = VCC Min Typical VCC is 3.0V A29L400 Series Min. Typ. Max. Unit ...

Page 22

... Note: Addresses are switching at 1MHz I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 Note : PRELIMINARY (October, 2002, Version 0.2) 1500 2000 2500 Time Frequency in MHz Typical I vs. Frequency CC1 22 A29L400 Series 3000 3500 4000 3.6V 2. AMIC Technology, Inc. ...

Page 23

... Version 0.2) Description Test Setup = Read Toggle and Data Polling t RC Addresses Stable t ACC OEH t CE High-Z Output Valid 23 A29L400 Series Speed -70 -90 Min Max Max Max Min Min Max. 25 ...

Page 24

... Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms RY/BY CE, OE RESET PRELIMINARY (October, 2002, Version 0.2) Description Test Setup Ready A29L400 Series All Speed Options Max 20 Max 500 Min 500 Min 50 Min 0 Min AMIC Technology, Inc. Unit ...

Page 25

... Note: Not 100% tested. Temporary Sector Unprotect Timing Diagram 12V RESET t VIDR RSP RY/BY PRELIMINARY (October, 2002, Version 0. - +85 C) Description Program or Erase Command Sequence 25 A29L400 Series All Speed Options Min 500 Min VIDR AMIC Technology, Inc. Unit ns s ...

Page 26

... I/O 15 Output t FLQZ t ELFH Data Output (I/O -I Address Input t FHQV The falling edge of the last WE signal t SET ( and t specifications A29L400 Series All Speed Options -70 -90 Max 5 Max 25 30 Min 70 90 Data Output ) (I/O -I Address Input Data Output (I/O -I I/O 15 Output ...

Page 27

... Notes: 1. Not 100% tested. 2. See the "Erase and Programming Performance" section for more information. PRELIMINARY (October, 2002, Version 0. - +85 C) Description WE low) Byte Word BY BY Delay 27 A29L400 Series Speed -70 -90 Min Min. 0 Min Min Min. ...

Page 28

... PA = program addrss program data, Dout is the true data at the program address. 2. Illustration shows device in word mode. PRELIMINARY (October, 2002, Version 0. WPH A0h PD t BUSY 28 A29L400 Series Read Status Data (last two cycles WHWH1 D Status OUT t RB AMIC Technology, Inc. ...

Page 29

... SA = Sector Address (for Sector Erase Valid Address for reading status data (see "Write Operaion Ststus"). 2. Illustratin shows device in word mode. PRELIMINARY (October, 2002, Version 0. 555h for chip erase WPH 55h 30h 10h for chip erase 29 A29L400 Series Read Status Data WHWH2 In Complete Progress BUSY AMIC Technology, Inc. ...

Page 30

... Note : VA = Valid Address. Illustation shows first status cycle after command sequence, last status read cycle, and array data read cycle. PRELIMINARY (October, 2002, Version 0. Complement Complement Status Data Status Data 30 A29L400 Series VA High-Z Valid Data True High-Z Valid Data True AMIC Technology, Inc. ...

Page 31

... PRELIMINARY (October, 2002, Version 0. Valid Status Valid Status (first read) (second read) . Illustration shows first two status cycle after command sequence, last status 6 31 A29L400 Series VA VA Valid Status Valid Data (stop togging) AMIC Technology, Inc. ...

Page 32

... Timing Waveforms for Sector Protect/Unprotect RESET SA, A6, A1, A0 Sector Protect/Unprotect 60h Data 1us Note : For sector protect, A6=0, A1=1, A0=0. For sector unprotect, A6=1, A1=1, A0=0 PRELIMINARY (October, 2002, Version 0.2) Valid* Valid* Verify 60h 40h Sector Protect:150us Sector Unprotect:15ms 32 A29L400 Series Valid* Status AMIC Technology, Inc. ...

Page 33

... Version 0.2) 6 Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program and I/O in the section "Write Operation Status" for 6 2 Description WE Low) Byte Word 33 A29L400 Series Erase Resume Erase Erase Read Complete Speed -70 -90 Min Min. 0 Min Min. ...

Page 34

... Complement of Data Input Typ. (Note 1) Max. (Note 2) 1 300 12 500 11 33 7.2 21.6 for further information A29L400 Series PA I OUT = Array Data. OUT Unit Comments sec Excludes 00h programming prior to erasure sec s s Excludes system-level sec overhead (Note 5) sec AMIC Technology, Inc ...

Page 35

... Notes: 1. Sampled, not 100% tested. 2. Test conditions 1.0MHz A Data Retention Parameter Minimum Pattern Data Retention Time PRELIMINARY (October, 2002, Version 0.2) Description Test Setup V Test Conditions 150 C 125 C 35 A29L400 Series Min. Max. -1.0V VCC+1.0V -100 mA +100 mA -1.0V 12.5V Typ. Max 7 ...

Page 36

... Input Pulse Levels Input timing measurement reference levels Output timing measurement reference levels Test Setup Device Under Test PRELIMINARY (October, 2002, Version 0.2) - 0.0 - 3.0 1.5 1.5 3 A29L400 Series -90 Unit 1 TTL gate 100 0.0 - 3.0 V 1.5 V 1.5 V Diodes = IN3064 or Equivalent AMIC Technology, Inc. ...

Page 37

... Current Typ. (mA) Typ. (mA Active Read Program/Erase Current Current Typ. (mA) Typ. (mA A29L400 Series Standby Current Package Typ 44Pin SOP 48Pin TSOP 0.2 48-ball TFBGA 44Pin SOP 48Pin TSOP 48Pin TSOP 0.2 48-ball TFBGA 48-ball TFBGA Standby Current Package Typ ...

Page 38

... A29L400 Series unit: inches/mm L Detail See Detail F Max 3.00 - 2.77 0.50 0.25 28.70 12.70 - 16.33 1.02 - 1.14 0.10 8 AMIC Technology, Inc. ...

Page 39

... BASIC 0.50 BASIC 0.016 0.020 0.024 0.40 0.011 Typ. 0.28 Typ 0.004 - 0° - 8° 0° 39 A29L400 Series unit: inches/ Detail "A" Max - 1.20 - 0.15 1.00 1.06 0.22 0.27 - 0.20 20.20 18.50 12.10 0.50 0.60 - 0.10 - 8° AMIC Technology, Inc. ...

Page 40

... Ball*A1 CORNER C 0.10 C PRELIMINARY (October, 2002, Version 0.2) TOP VIEW BOTTOM VIEW SIDE VIEW SEATING PLANE Dimensions in mm Symbol Min. Nom. Max 0. 5.90 6.00 D 4.00 BSC 0.80 E 7.90 8.00 E 5.60 BSC 1 40 A29L400 Series unit 1.20 0.30 0.40 6.10 - 8.10 AMIC Technology, Inc. ...

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