AK4640VG Asahi Kasei Microsystems, AK4640VG Datasheet - Page 58
AK4640VG
Manufacturer Part Number
AK4640VG
Description
16BIT CODEC WITH MIC /HP/SPK-AMPl
Manufacturer
Asahi Kasei Microsystems
Datasheet
1.AK4640VG.pdf
(76 pages)
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ASAHI KASEI
MS0273-E-00
Addr
Addr
0BH
0CH
0DH
IPGA6-0: Input Analog PGA (see Table 32)
ATTL/R7-0: Digital ATT Output Control (see Table 18)
Register Name
Input PGA Control
Register Name
Lch Digital ATT Control
Rch Digital ATT Control
Default: “10H” (0dB)
When IPGA gain is changed, IPGA6-0 bits should be written while PMMIC bit is “1” and ALC1 bit is “0”.
IPGA gain is reset when PMMIC bit is “0”, and then IPGA operation starts from the default value when
PMMIC is changed to “1”. When ALC1 bit is changed from “1” to “0”, IPGA holds the last gain value set by
ALC1 operation. When IPGA6-0 bits are read, the register values written by the last write operation are read
out regardless the actual gain.
Default: “00H” (0dB)
Default
Default
R/W
R/W
DATA (HEX)
47
46
45
36
10
06
05
04
03
02
01
00
:
:
:
ATTR7
ATTL7
R/W
RD
D7
D7
0
0
0
Table 32. Input Gain Setting
ATTR6
ATTL6
IPGA6
R/W
R/W
GAIN (dB)
D6
D6
0
0
+27.5
+27.0
+26.5
+19.0
+0.0
−5.0
−5.5
−6.0
−6.5
−7.0
−7.5
−8.0
:
:
:
- 58 -
ATTR5
ATTL5
IPGA5
R/W
R/W
D5
D5
0
0
ATTR4
ATTL4
IPGA4
STEP
0.5dB
R/W
R/W
D4
D4
1
0
ATTR3
ATTL3
IPGA3
R/W
R/W
D3
D3
Default
0
0
ATTL2
ATTR2
IPGA2
R/W
R/W
D2
D2
0
0
ATTL1
ATTR1
IPGA1
R/W
R/W
D1
D1
0
0
[AK4640]
ATTL0
ATTR0
IPGA0
2004/03
R/W
R/W
D0
D0
0
0
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