ML7000-01 OKI electronic componets, ML7000-01 Datasheet

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ML7000-01

Manufacturer Part Number
ML7000-01
Description
Single Rail CODEC
Manufacturer
OKI electronic componets
Datasheet
E2U0062-18-84
¡ Semiconductor
¡ Semiconductor
ML7000-01/02/03
ML7001-01/02/03
Single Rail CODEC
GENERAL DESCRIPTION
The ML7000/ML7001 are single-channel CMOS CODEC LSI devices for voice signals ranging
from 300 to 3400 Hz with filters for A/D and D/A conversion.
Designed especially for a single-power supply and low-power applications, the devices are
optimized for ISDN terminals, digital wireless systems, and digital PBXs.
The devices use the same transmission clocks as those used in the MSM7507.
With the differential analog signal outputs which can drive 60 W load, the devices can directly
drive a handset receiver.
FEATURES
• Single power supply: +5 V (ML7000-xx)
• Low power consumption
• Conforms to ITU-T Companding law
• Transmission characteristics conform to ITU-T G.714
• Short frame sync timing operation
• Built-in PLL eliminates a master clock
• Serial data rate: 64/96/128/192/200/256/384/512/
• Adjustable transmit gain
• Adjustable receive gain
• Built-in reference voltage supply
• Package options:
Operating mode:
Power-down mode:
24-pin plastic SOP (SOP24-P-430-1.27-K)
20-pin plastic SSOP (SSOP20-P-250-0.95-K) (Product name: ML7000-01MB/ML7001-01MB)
ML7000-01/ML7001-01:
ML7000-02/ML7001-02:
ML7000-03/ML7001-03:
768/1024/1536/1544/2048 kHz
+3 V (ML7001-xx)
0.05 mW Typ.
0.03 mW Typ.
25 mW Typ.
20 mW Typ.
m/A-law pin selectable
m-law
A-law
V
V
V
V
DD
DD
DD
DD
(Product name: ML7000-01MA/ML7001-01MA)
(Product name: ML7000-02MA/ML7001-02MA)
(Product name: ML7000-03MA/ML7001-03MA)
(Product name: ML7000-02MB/ML7001-02MB)
(Product name: ML7000-03MB/ML7001-03MB)
= 5.0 V (ML7000-xx)
= 3.0 V (ML7001-xx)
= 5.0 V (ML7000-xx)
= 3.0 V (ML7001-xx)
ML7000-01/02/03/ML7001-01/02/03
This version: Aug. 1998
1/19

Related parts for ML7000-01

ML7000-01 Summary of contents

Page 1

... Serial data rate: 64/96/128/192/200/256/384/512/ 768/1024/1536/1544/2048 kHz • Adjustable transmit gain • Adjustable receive gain • Built-in reference voltage supply • Package options: 24-pin plastic SOP (SOP24-P-430-1.27-K) 20-pin plastic SSOP (SSOP20-P-250-0.95-K) (Product name: ML7000-01MB/ML7001-01MB) ML7000-01/02/03/ML7001-01/02/ 5.0 V (ML7000-xx 3.0 V (ML7001-xx) ...

Page 2

... Semiconductor BLOCK DIAGRAM – AIN– LPF AIN+ GSX SGC SG GEN SG – VFRO + PWI – AOUT– + – AOUT+ + ML7000-01/02/03/ML7001-01/02/03 8th A/D TCONT BPF CONV. AUTO PLL ZERO VR GEN RTIM 5th D/A LPF CONV. RCONT PWD PWD Logic PCMOUT XSYNC BCLK ...

Page 3

... AOUT– PWI 5 VFRO PDN 10 RSYNC 11 PCMIN 12 24-Pin Plastic SOP * The ALAW pin is only supported by the ML7000-01MA/ML7000-01MB/ML7001-01MA/ ML7001-01MB connect pin ML7000-01/02/03/ML7001-01/02/ SGC AIN+ AOUT AIN– AOUT– GSX PWI 4 20 ...

Page 4

... For driving a load of less than 20 kW, connect a resistor more between the pins VFRO and PWI. During power-saving or power-down mode, the VFRO output level. When adjusting the receive signal on the basis of frequency characteristics, refer to the Frequency Characteristics Adjustment Circuit. ML7000-01/02/03/ML7001-01/02/03 GSX AIN– R2 – ...

Page 5

... The frequency, equal to the data rate, is 64, 96, 128, 192, 256, 384, 512, 768, 1024, 1536, 1544, or 2048 kHz. Setting this signal to logic "1" or "0" drives both transmit and receive circuits to the power saving state. ML7000-01/02/03/ML7001-01/02/ > > ...

Page 6

... Setting this signal to logic "1" or "0" drives both transmit and receive circuits to the power saving state. ML7000-01/02/03/ML7001-01/02/03 6/19 ...

Page 7

... This device is compatible with the ITU-T recommendation on coding law and output coding format. The ML7000-03 (A-law) and ML7001-03 (A-law) output the character signal, inverting the even bits. Input/Output Level +Full scale +0 –0 –Full scale ML7000-01/02/03/ML7001-01/02/03 PCMIN/PCMOUT ML7000-02 (m-law) ML7001-02 (m-law) MSD LSD ...

Page 8

... ALAW Control signal input of the companding law selection. Only the ML7000-01MA/ML7000-01MB/ML7001-01MA/ML7001-01MB have this pin. The CODEC will operate in the m-law when this pin logic "0" level and the CODEC will operate in the A-law when this pin logic "1" level. The CODEC operates in the m-law if the pin is left open, since the pin is internally pulled down ...

Page 9

... RSYNC Setup Time RSYNC Hold Time PCMIN Setup Time PCMIN Hold Time Digital Output Load Analog Input Allowable DC Offset Allowable Jitter Width Values above the dotted line are for ML7000-xx; those below, for ML7001-xx. ML7000-01/02/03/ML7001-01/02/03 Symbol Condition V — — ...

Page 10

... High Level Input Leakage Current High Level Input Leakage Current Low Level Input Leakage Current Digital Output Low Voltage Digital Output Leakage Current Input Capacitance Values above the dotted line are for ML7000-xx; those below, for ML7001-xx. ML7000-01/02/03/ML7001-01/02/03 (ML7001-xx: V (ML7000-xx: V Symbol Condition Operating mode ...

Page 11

... Values above the dotted line are for ML7000-xx; those below, for ML7001-xx. Receive Analog Interface Characteristics Parameter Input Resistance Output Load Resistance Output Load Capacitance Output Amplitude Offset Voltage Values above the dotted line are for ML7000-xx; those below, for ML7001-xx. ML7000-01/02/03/ML7001-01/02/03 (ML7001-xx: V (ML7000-xx: V Symbol Condition R AIN+, AIN– INX R ...

Page 12

... Receive Frequency Response Transmit Signal to Distortion Ratio Receive Signal to Distortion Ratio Transmit Gain Tracking Receive Gain Tracking *1 Psophometric filter is used. Values above the dotted line are for ML7000-xx; those below, for ML7001-xx. ML7000-01/02/03/ML7001-01/02/03 (ML7001-xx kHz (ML7000-xx kHz Freq ...

Page 13

... Psophometric filter is used. *2 Input "0" code to PCMIN. *3 AVR is defined at VFRO output. *4 With respect to minimum value of the group delay distortion. Values above the dotted line are for ML7000-xx; those below, for ML7001-xx. ML7000-01/02/03/ML7001-01/02/03 (ML7001-xx kHz (ML7000-xx kHz Freq ...

Page 14

... Semiconductor AC Characteristics (Continued) Parameter Discrimination Out-of-band Spurious Intermodulation Distortion Power Supply Noise Rejection Ratio Digital Output Delay Time *5 Measured under idle channel noise. ML7000-01/02/03/ML7001-01/02/03 (ML7001-xx kHz (ML7000-xx kHz Freq. Level Symbol Condition (Hz) (dBm0) 4.6 kHz to ...

Page 15

... PCM Data Input/Output Timing Transmit Timing BCLK XSYNC t XD1 PCMOUT MSD Receive Timing BCLK RSYNC PCMIN MSD ML7000-01/02/03/ML7001-01/02/ Figure 1 Basic Timing 8 ...

Page 16

... 0 600 W 600:600 600:600 300 W 300 ML7000-01/02/03/ML7001-01/02/ ML7000-01 AIN– PCMOUT XSYNC GSX RSYNC AIN+ BCLK SG PCMIN AOUT+ ALAW AOUT– PWI VFRO 0.1 mF PDN SGC ...

Page 17

... Use a low noise (particularly, low level type of high frequency spike noise or pulse noise) power supply to avoid erroneous operation and the degradation of the characteristics of these devices. ML7000-01/02/03/ML7001-01/02/03 pin not lower than –0.3 V even instantaneously to avoid latch- 17/19 ...

Page 18

... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). ML7000-01/02/03/ML7001-01/02/03 (Unit : mm) Package material Epoxy resin ...

Page 19

... Therefore, before you perform reflow mounting, contact Oki’s responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). ML7000-01/02/03/ML7001-01/02/03 (Unit : mm) Package material Epoxy resin ...

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