AM79C960KCW Advanced Micro Devices, AM79C960KCW Datasheet - Page 31
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AM79C960KCW
Manufacturer Part Number
AM79C960KCW
Description
PCnetTM-ISA Single-Chip Ethernet Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C960KCW.pdf
(127 pages)
- Current page: 31 of 127
- Download datasheet (815Kb)
Shared Memory Mode
System Interface
The Shared Memory mode is the other fundamental op-
erating mode available on the PCnet-ISA controller. The
PCnet-ISA controller uses the same descriptor and
buffer architecture as the LANCE, but these data struc-
tures are stored in static RAM controlled by the
PCnet-ISA controller. The static RAM is visible as a
memory resource to the PC. The other resources look
the same as in the Bus Master mode.
The Boot PROM is selected by an external device which
drives the Boot PROM Address Match (BPAM) input to
the PCnet-ISA controller. The PCnet-ISA controller can
perform two 8-bit accesses from the 8-bit Boot PROM
and present16-bits of data. The shared memory works
the same way, with an external device generating
Shared Memory Address Match and the PCnet-ISA
controller performing the read or write and the 8 to 16-bit
data conversion.
Converting shared memory accesses from 8-bit cycles
to 16-bit cycles allows use of the much faster 16-bit cy-
cle timing while cutting the number of bus cycles in half.
This raises performance to more than 400% of what
could be achieved with 8-bit cycles. Converting boot
PROM accesses to 16-bit cycles allows the two memory
resources to be in the same 128 Kbyte block of memory
without a clash between two devices with different data
widths.
Note that the external address buffer must drive all the
bits of PRAB10-15 even if the static RAM is less than
64 Kbytes. The PCnet-ISA controller uses an internal
Bus
ISA
16-Bit System Data
Address
System
ABOE BPAM SMAM
Compare
E
Address
Address
Buffer
PCnet-ISA
Controller
Shared Memory Block Diagram
P R E L I M I N A R Y
PRAB0–15
PRDB0–7
SRWE
APCS
SROE
BPCS
Am79C960
8-Bit Private Data
address comparator to perform SRAM prefetches on
the Private Data Bus; the PRAB0-15 signals are used in-
ternally to determine whether a SRAM read cycle
prefetch is a match or a miss.
Access to the Ethernet controller registers, board con-
figuration registers, and Address PROM is done with
on-chip address comparators.
Network Interface
The PCnet-ISA controller can be connected to an IEEE
802.3 network via one of two network interface ports.
The Attachment Unit Interface (AUI) provides an
IEEE 802.3 compliant differential interface to a remote
MAU or a transceiver on the system board. The
10BASE-T interface provides a twisted-pair Ethernet
port. The PCnet-ISA controller provides three modes of
network interface selection: automatic selection, soft-
ware selection, and jumper selection of AUI or
10BASE-T interface.
In the automatic selection mode, the PCnet-ISA control-
ler will select the interface that is connected to the
network by checking the Link Status state machine. If
both AUI and 10BASE-T interfaces are connected, the
10BASE-T interface is selected over AUI. If the
PCnet-ISA controller is initialized for software selection
of network interface, it will read the PORTSEL [1:0] bits
in the Mode register (CSR15.8 and CSR15.7) to deter-
mine which interface needs to be activated. For jumper
selection of the network interface, the MAUSEL pin is
used. When the XMAUSEL bit in ISACSR2 is set, a
HIGH on the pin will select the 10BASE-T interface, and
a LOW on the pin will select the AUI interface.
16-Bit Private Address Bus
A0–X
D0–7
A0–X
D0–7
OE
WE
A0–X
D0–7
CS
CS
OE
Ethernet
Address
PROM
PROM
SRAM
8-Bit
Boot
CS
16907B-6
AMD
1-373
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