AM79C960KCW Advanced Micro Devices, AM79C960KCW Datasheet - Page 69
AM79C960KCW
Manufacturer Part Number
AM79C960KCW
Description
PCnetTM-ISA Single-Chip Ethernet Controller
Manufacturer
Advanced Micro Devices
Datasheet
1.AM79C960KCW.pdf
(127 pages)
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CSR50-51: Temporary Storage
Bit
31-0
CSR52-53: Temporary Storage
Bit
31-0
CSR54-55: Temporary Storage
Bit
31-0
CSR56-57: Temporary Storage
Bit
31-0
CSR58-59: Temporary Storage
Bit
31-0
CSR60-61: Previous Transmit Descriptor Address
Bit
31-24
23-0
PXDA
TMP1
TMP2
TMP3
TMP4
TMP5
Name
Name
Name
Name
Name
Name
RES
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
Temporary Storage location.
Read/write accessible only when
STOP bit is set.
Reserved locations. Written as
zero and read as undefined.
Contains the previous TDRE ad-
dress pointer. The PCnet-ISA
controller has the capability to
stack multiple transmit frames.
Read/write accessible only when
STOP bit is set.
Description
Description
Description
Description
Description
Description
P R E L I M I N A R Y
Am79C960
CSR62-63: Previous Transmit Status and Byte
Bit
31-24 PXST
23-12
11-0
CSR64-65: Next Transmit Buffer Address
Bit
31-24
23-0
CSR66-67: Next Transmit Status and Byte Count
Bit
31-24 NXST
23-12
11-0
NXBC
PXBC
NXBA
Name
Name
Name
RES
RES
RES
Count
Previous Transmit Status. This
field is a copy of bits 15:8 of
TMD1 of the previous transmit
descriptor.
Read/write accessible only when
STOP bit is set.
Reserved locations. Written as
zero and read as undefined.
Accessible only when STOP bit is
set.
Previous Transmit Byte Count.
This field is a copy of the BCNT
field of TMD2 of the previous
transmit descriptor.
Read/write accessible only when
STOP bit is set.
Reserved locations. Written as
zero and read as undefined.
Contains the next transmit buffer
address
PCnet-ISA controller will transmit
an outgoing frame.
Read/write accessible only when
STOP bit is set.
Next Transmit Status. This field
is a copy of bits 15:8 of TMD1 of
the next transmit descriptor.
Read/write accessible only when
STOP bit is set.
Reserved locations. Written as
zero and read as undefined.
Accessible only when STOP bit is
set.
Next Transmit Byte Count. This
field is a copy of the BCNT field of
TMD2 of the next transmit
descriptor.
Read/write accessible only when
STOP bit is set.
Description
Description
Description
from
which
AMD
1-411
the
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