AM79C989JCT Advanced Micro Devices, AM79C989JCT Datasheet - Page 24

• Manufacturer Part Number: AM79C989JCT
• Description: Quad Ethernet Switching Transceiver (QuEST)
• Manufacturer: Advanced Micro Devices

Interrupt Status and Enable Register (Reg 16)
Interrupt Status and Enable Register (Reg 16) contains
Read/Write (R/W), Read/Only (R/O), or Cleared on
24
Bit(s)
15:13
7:5
12
11
10
9
8
4
3
2
1
0
Link Status Change
Link Status Change
Auto-Negotiation
Auto-Negotiation
Interrupt Enable
Interrupt Enable
Interrupt Enable
Interrupt Enable
Interrupt Enable
Duplex Change
Duplex Change
MAU Error
MAU Error
Reserved
Reserved
Interrupt
Interrupt
Interrupt
Interrupt
Interrupt
Change
Change
Global
Global
Name
Table 16. Interrupt Status and Enable Register (Reg 16)
1 = Link Status Change Interrupt drives the QINT pin;
0 = The Interrupt is masked.
1 = Duplex Change Interrupt drives the QINT pin;
0 = The Interrupt is masked.
1 = Auto-Negotiation Change Interrupt drives the QINT pin (i.e.,
new page received);
0 = The Interrupt is masked.
1 = MAU Error Interrupt drives the QINT pin;
0 = The Interrupt is masked.
1 = Any Interrupt drives the QINT pin;
0 = The Interrupt is masked.
1 = Link Status changed on one of the 4 ports;
0 = No change in Link Status.
Register bit is cleared on Read.
1 = Duplex mode changed on one of the 4 ports;
0 = Indicates no change in Duplex mode.
Register bit is cleared on Read.
1= Auto-Negotiation status has changed on one of the 4 ports;
0 = Indicates no change.
Register bit is Cleared on Read.
1 = A MAU error has occurred on one of the 4 ports; set on any
error bit in the Status Register (Reg 19) for any port;
0 = Indicates no MAU errors have occurred.
Register bit is cleared on Read.
1 = Change in status of any of the above interrupts;
0 = No Interrupt condition.
Register bit is Cleared on Read.
Written and read as zero.
Written and read as zero.
P R E L I M I N A R Y
Am79C989
Description
Read (COR) bits. This register is shared across all
ports.
R/O, COR
R/O, COR
R/O, COR
R/O, COR
R/O, COR
Read/
Write
R/W
R/W
R/W
R/W
R/W
R/O
R/O
Default/
Reset
0
0
0
0
0
0
0
0
0
0
0
0