M36L0R8060 ST Microelectronics, M36L0R8060 Datasheet - Page 16

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M36L0R8060

Manufacturer Part Number
M36L0R8060
Description
256 Mbit (Multiple Bank / Multi-Level / Burst) Flash Memory 64 Mbit (Burst) PSRAM
Manufacturer
ST Microelectronics
Datasheet

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M36L0R8060T0, M36L0R8060B0
PART NUMBERING
Table 10. Ordering Information Scheme
Example:
M36 L 0 R 8 0 6 0 T 0 ZAQ T
Device Type
M36 = Multi-Chip Package (Flash + RAM)
Flash 1 Architecture
L = Multilevel, Multiple Bank, Burst mode
Flash 2 Architecture
0 = No Die
Operating Voltage
R = V
= V
= V
= 1.7 to 1.95V
DDF
CCP
DDQ
Flash 1 Density
8 = 256 Mbits
Flash 2 Density
0 = No Die
RAM 1 Density
6 = 64 Mbits
RAM 0 Density
0 = No Die
Parameter Blocks Location
T = Top Boot Block Flash
B = Bottom Boot Block Flash
Product Version
0 = 0.13µm Flash Technology Multi-Level Design, 85ns speeds;
0.11µm PSRAM, 70ns speed, burst mode
Package
ZAQ = Stacked TFBGA88 8x10mm - 8x10 active ball array, 0.8mm pitch
Option
Blank = Standard Packing
T = Tape & Reel Packing
E = Lead-free and RoHS Standard packing
F = Lead-free and RoHS Tape & Reel packing
Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available op-
tions (Speed, Package, etc.) or for further information on any aspect of this device, please contact the ST-
Microelectronics Sales Office nearest to you.
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