LRS13023 Sharp, LRS13023 Datasheet - Page 3
LRS13023
Manufacturer Part Number
LRS13023
Description
Stacked Chip 8M Flash and 1M SRAM
Manufacturer
Sharp
Datasheet
1.LRS13023.pdf
(61 pages)
- Current page: 3 of 61
- Download datasheet (4Mb)
SHARP
OFully static operation
oThree-state output
ONot designed or rated as radiation hardened
040 pin
OFlash memory has P-type bulk silicon, and SRAh4 has N-type bulk silicon.
l.Description
ostandbycurrent
OPower supply
OSRAM data retention voltage
OOperating temperature
Features
OAccess Time
OOpemtingcurrent
(Total standby curnat is the summation of Flash memory’s standby current and SRAM’s one.)
The LRS1302 is a combination memory organized as
It is fabricated using silicon-gate CMOS process technology.
memory and
Flash memory
Sk4M
Flashmemoryaccesstime
SRAM access time
Flash memory Read
SRAM
TSOP ( TSOP~O-p-0819
-
Byte write
Block erase
operatin%
131,072X8
The contents described in Part 1 take first priority over Part 2 and Part 3.
bit static RAM in one package.
plastic package
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LRS13023
Part 1 Overview
1448,576 X 8
2.7V to 3.6V
2.7~ to 3.6~
0.7 @ Typ.
130 nsMax.
40°C to +85”c
25 mA Max.
20 @ Max.
30 pA Max.
70 nsMax.
57 r&Max.
37 mAMax.
12 mAMax.
2.0 V Min.
,
bit flash
@ead/SRAM
@LASH erase/write)(T,=O to 85c
(T,=25”c, S-V,-3V,
(S-EZS-Vc,0.2V)
(F-EZF-Vc,0.2V,
(t&ti2OOns)
hcxJz.=2=)
EbO.2V,
S-CErs-Vcc-0.2V)
F-V&O.2V)
write)
2
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