HYS64D16020GDL-7-A Infineon, HYS64D16020GDL-7-A Datasheet
HYS64D16020GDL-7-A
Related parts for HYS64D16020GDL-7-A
HYS64D16020GDL-7-A Summary of contents
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... Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies failure of such components can reasonably be expected to cause the approval of Infineon Technologies failure of such components can reasonably be expected to cause the failure failure of that life-support device or system affect the safety or effectiveness of that device or system. Life of that life-support device or system affect the safety or effectiveness of that device or system ...
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... We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: techdoc.mp@infineon.com Data Sheet Data Sheet HYS64D16020GD(L)-[7/8]-A ...
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... Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.1 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3.2 Current Specification and Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.3 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4 SPD Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 5 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Data Sheet HYS64D16020GD(L)-[7/8]-A Unbuffered DDR SDRAM SO Modules 5 Rev. 1.02, 2004-01 11042003-YIV7-VK6M ...
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... Overview 1.1 Features • 200-pin Unbuffered 8-Byte Dual-In-Line DDR SDRAM non-parity Small Outline Modules • One rank 16M x 64 organization • JEDEC standard Double Data Rate Synchronous DRAMs (DDR SDRAM) • Single + 2 0.2 V) power supply • Built with 128 Mbit DDR SDRAMs organised 66-Lead TSOPII packages • ...
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... Table 2 Ordering Information Type Compliance Code PC2100 (CL=2): HYS64D16020GDL-7-A PC2100-20330-A PC1600 (CL=2): HYS64D16020GDL-8-A PC1600-20220-A Note: All part numbers end with a place code, designating the silicon-die revision. Reference information available on request. Example: HYS 64D32020GDL-8-B, indicating Rev.B die are used for DDR-SDRAM components. The Compliance Code which is printed on the module labels describes the speed sort class (“ ...
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... SDA I/O SA0 - SA2 Input; O: Output; I/O: bidirectional In-/Output; AI: Analog Input; PWR: Power Supply; GND: Signal Ground; NC: Not Connected Note: S1 and CKE1 are used on two rank modules only Data Sheet Unbuffered DDR SDRAM SO Modules 1) Function Address Inputs Bank Selects Data Input/Output ...
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... DQ19 DQ24 DQ25 80 36 DQS3 DQ26 84 Data Sheet Unbuffered DDR SDRAM SO Modules Backside Symbol PIN# Symbol CB2 94 DQ4 V 95 DQ5 CB3 96 DDQD BA1 97 DM0/DQS9 Key 98 DQ6 99 DQ7 V DQ32 100 ...
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... MB 16M 64 2 Note: Pins 71, 72, 73, 74, 77, 78, 79, 80, 83, 84, 89 and 91 are reserved for x72 variants of this module and are not used on the x64 versions. Pin 86 is reserved for a registered variant of this module and is not used on the unbuffered version Figure 1 Pin Configuration ...
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... SPD DD SDRAMS D0-D7 V REF SDRAMS D0- SDRAMS D0-D7, SPD Figure 2 Block Diagram: Two Rank 16M x 64 DDR-SDRAM SO-DIMM Modules using x16 Organized 128Mbit SDRAMs on Raw Card Version A Data Sheet Unbuffered DDR SDRAM SO Modules DQS4 LDQS LDQ S DM4 LDM LDM DQ32 I/O 0 ...
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... Exposure to absolute maximum rating conditions for extended periods of time may affect device reliability and exceeding only one of the values may cause irreversible damage to the integrated circuit. Data Sheet Unbuffered DDR SDRAM SO Modules Symbol min – ...
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... V. For a given output, it represents the maximum difference between pull-up and pull-down drivers due to process variation. 7) Inputs are not recognized as valid until 8) Values are shown per component Data Sheet Unbuffered DDR SDRAM SO Modules Values Min. Typ. Max. ...
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... for DDR266(A for DDR333 and DDR400B Auto-Refresh Current burst refresh RC RFCMIN Self-Refresh Current CKE 0.2 V; external clock on Operating Current 7 four bank interleaving with Burst Length = 4; see component data sheet. Data Sheet Unbuffered DDR SDRAM SO Modules V IL,MAX V ; IH,MIN for DQ, DQS and DM; ...
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... Test condition for maximum values The module values are calculated from the DDx m I [component [component] with m and n number of components of rank 1 and 2; n=0 for 1 rank modules DDx DD3N I currents are not included in the calculations (see note 1) DDQ I 5) The module ...
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... DQS falling edge to CK setup time (write cycle) DQS falling edge hold time from CK (write cycle) Mode register set command cycle time Write preamble setup time Write postamble Data Sheet Unbuffered DDR SDRAM SO Modules Symbol –8 DDR200 DDR266A Min Max. Min. ...
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... Inputs are not recognized as valid until 5) The Output timing reference level, as measured at the timing reference point indicated in AC Characteristics (note These parameters guarantee device timing, but they are not necessarily tested on each device. Data Sheet Unbuffered DDR SDRAM SO Modules Symbol –8 DDR200 Min Max ...
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... For each of the terms, if not already an integer, round to the next highest integer. cycle time. 14) A maximum of eight Autorefresh commands can be posted to any given DDR SDRAM device. Data Sheet Unbuffered DDR SDRAM SO Modules 0.5 V/ns and < 1 V/ns for command/address and CK & CK slew rate > 1.0 V/ns ...
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... Address 16 Burst Length Supported 17 Number of SDRAM Ranks 18 Supported CAS Latencies 19 CS Latencies 20 WE Latencies 21 SDRAM DIMM Module Attributes unbuffered 22 SDRAM Device Attributes: General 23 Min. Clock Cycle Time at CAS Latency = 2 24 Access Time from Clock for Minimum Clock Cycle Time for ...
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... HEX. HEX Infineon Infineon – – – – – – – – – – – – – – Rev. 1.02, 2004-01 11042003-YIV7-VK6M ...
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... PRELIMINARY 5 Package Outlines (2.15) 1 18.45 1.8 11.4 ±0.1 (2.45) 1.5 1 ±0.1 101 2 MIN. Detail of contacts 0.6 ±0.1 Burnished, no burr allowed Figure 3 Package Outlines Raw Card A : DDR-SDRAM SO-DIMM Modules Raw Card A Data Sheet Unbuffered DDR SDRAM SO Modules 67.6 63.6 ±0.1 (2.45) 100 ±0.1 ±0.1 (2.4) 47.4 ±0.1 (2.7) (2.15) ±0.1 200 0.45 ±0.03 21 HYS64D16020GD(L)-[7/8]-A Package Outlines 3.8 MAX. ...
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... Published by Infineon Technologies AG ...