PSD913212JIT ST Microelectronics, PSD913212JIT Datasheet - Page 52

no-image

PSD913212JIT

Manufacturer Part Number
PSD913212JIT
Description
Flash In-System Programmable ISP Peripherals For 8-bit MCUs
Manufacturer
ST Microelectronics
Datasheet
The
PSD9XX
Functional
Blocks
(cont.)
48
PSD9XX Family
9.4.3.3 Drive Select Register
The Drive Select Register configures the pin driver as Open Drain or CMOS for some port
pins, and controls the slew rate for the other port pins. An external pull-up resistor should
be used for pins configured as Open Drain.
A pin can be configured as Open Drain if its corresponding bit in the Drive Select Register
is set to a ‘1’. The default pin drive is CMOS.
Aside: the slew rate is a measurement of the rise and fall times of an output. A higher
slew rate means a faster output response and may create more electrical noise. A pin
operates in a high slew rate when the corresponding bit in the Drive Register is set to ‘1’.
The default rate is slow slew.
Table 27 shows the Drive Register for Ports A, B, C, and D. It summarizes which pins can
be configured as Open Drain outputs and which pins the slew rate can be set for.
NOTE: NA = Not Applicable.
Table 27. Drive Register Pin Assignment
Register
Port A
Port B
Port D
Drive
Open
Open
Drain
Drain
Bit 7
NA
Open
Drain
Open
Drain
Bit 6
NA
Open
Drain
Open
Drain
Bit 5
NA
Open
Open
Drain
Drain
Bit 4
NA
Bit 3
Slew
Slew
Rate
Rate
NA
Bit 2
Slew
Slew
Slew
Rate
Rate
Rate
Preliminary Information
Bit 1
Slew
Slew
Slew
Rate
Rate
Rate
Bit 0
Slew
Rate
Slew
Rate
Slew
Rate

Related parts for PSD913212JIT