PSD913F1-B-90JI ST Microelectronics, PSD913F1-B-90JI Datasheet - Page 36

• Manufacturer Part Number: PSD913F1-B-90JI
• Description: Flash In-System Programmable ISP Peripherals For 8-bit MCUs
• Manufacturer: ST Microelectronics

32
PSD9XX Family
Figure 9. PLD Block Diagrams
Figure 10. DPLD Logic Array
*
NOTE: The address inputs are A[19:4] in 80C51XA mode.
I /O PORTS (PORT A,B,C)
PGR0 - PGR7
A [ 15:0 ]
PD [ 2:0 ] (ALE,CLKIN,CSI)
PDN (APD OUTPUT)
CNTRL [ 2:0 ] ( READ/WRITE CONTROL SIGNALS)
RESET
RD_BSY
DATA
BUS
*
57
57
8
PURPOSE PLD
DECODE PLD
REGISTER
PORT C PLD INPUT
PORT A PLD INPUT
PORT B PLD INPUT
PORT D PLD INPUT
GENERAL
PAGE
GPLD
(INPUTS)
(24)
(16)
(8)
(3)
(3)
(1)
(1)
(1)
8
8
8
3
PLD OUT
PLD OUT
PLD OUT
8
4
1
1
8
8
3
FLASH MEMORY SELECTS
SECONDARY FLASH MEMORY SELECTS
SRAM SELECT
CSIOP SELECT
3
3
3
3
3
3
3
3
3
3
3
3
2
CSBOOT 0
CSBOOT 1
CSBOOT 2
CSBOOT 3
RS0
CSIOP
FS0
FS7
PORT A
PORT B
PORT D
PORT C
Preliminary Information
SRAM SELECT
I/O DECODER
SELECT
4 SECONDARY
FLASH MEMORY
SECTOR SELECTS
8 FLASH MEMORY
SECTOR SELECTS