QL4009 QuickLogic, QL4009 Datasheet - Page 2

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QL4009

Manufacturer Part Number
QL4009
Description
Quick RAM
Manufacturer
QuickLogic
Datasheet

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Software support for the complete QuickRAM fam-
ily, including the QL4009, is available through two
basic packages. The turnkey QuickWorksTM pack-
age provides the most complete ESP software solu-
tion from design entry to logic synthesis, to place and
route, to simulation. The QuickTools
tions package provides a solution for designers who
use Cadence, Exemplar, Mentor, Syn-opsys, Synplic-
ity, Viewlogic, Veribest, or other third-party tools for
design entry, synthesis, or simulation.
The QuickLogic variable grain logic cell features up
to 16 simultaneous inputs and 5 outs within a cell
that can be fragmented into 5 independent cells.
Each cell has a fan-in of 29 including register and
control lines (see Figure 4).
WADDR
WDATA
WDATA
6-12
12
FIGURE 3. QuickRAM Module bits
FIGURE 2. QuickRAM Module
(1,152 bits)
(1,152 bits)
Module
Module
RAM
RAM
TM
QL4009 - QuickRAM
for Worksta-
RDATA
RADDR
RDATA
Preliminary
Product Summary
Total of 82 I/O Pins
Eight Low-Skew Distributed Networks
High Performance
Two array clock/controlnetworks available to the logic
cell flip-flop clock, set and reset inputs - each driven by
and input-only pin
Six global clock/control networks available to the logic
cell F1, clock, set and reset inputs and the input and I/O
register clock, reset and enable inputs as well as the out-
put enable control - each driven by an input-only or I/O
pin, or any logic cell output or I/O cell feedback
74 bi-directional input/output pins, PCI-compliant for
5.0 volt and 3.3 volt buses for -1/-2/-3/-4 speed grades
8 high-drive input/distributed network pins
Input + logic cell + output total delays under 6 ns
Data path speeds over 400 MHz
counter speeds over 300 MHz
FIFO speeds over 160 MHz
QS
A1
A2
OS
OP
A3
A4
A5
A6
B1
B2
C1
C2
MP
MS
D1
D2
E1
E2
NP
NS
F2
F3
F1
F4
F5
F6
QC
QR
P
RODUCT
FIGURE 4. Logic Cell
TM
S
UMMARY
AZ
OZ
QZ
NZ
FZ

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