CX28398 Conexant Systems, CX28398 Datasheet - Page 171

• Manufacturer Part Number: CX28398
• Description: (CX28394 - CX28398) Quad/x16/Octal?T1/E1/J1 Framers
• Manufacturer: Conexant Systems

CX28394/28395/28398
Quad/x16/Octal—T1/E1/J1 Framers
3.10 Performance Monitoring Registers
If the counter overflow interrupt [IER4; addr 00F] is enabled for the respective Performance Monitoring
counter, the counter is allowed to roll over after reaching its maximum count value. If the overflow interrupt is
disabled, the counter will hold its maximum value upon saturation. Refer also to LATCH [addr 046] for a
description of one-second latched counter operation. Processor must read LSB before reading MSB of each
multi-byte counter.
FERR[7:0]
If LATCH_CNT [addr 046] is inactive, reading FERR [addr 051] clears the entire FERR[11:0] count value.
FERR[11:8]
CERR[7:0]
If LATCH_CNT [addr 046] is inactive, reading CERR [addr 053] clears the entire CERR[9:0] count value.
CERR[9:8]
100054E
050—Framing Bit Error Counter LSB (FERR)
051—Framing Bit Error Counter MSB (FERR)
052—CRC Error Counter LSB (CERR)
053—CRC Error Counter MSB (CERR)
CERR[7]
FERR[7]
15
15
7
0
7
0
Ft/Fs/T1DM/FPS/FAS Error Count
Ft/Fs/T1DM/FPS/FAS Error Count
CRC6/CRC4 Error Count
CRC6/CRC4 Error Count
CERR[6]
FERR[6]
14
14
6
0
6
0
FERR[5]
CERR[5]
13
13
5
0
5
0
CERR[4]
FERR[4]
12
12
4
0
4
0
Conexant
FERR[11]
CERR[3]
FERR[3]
11
11
3
3
0
FERR[10]
FERR[2]
CERR[2]
10
10
2
2
0
3.10 Performance Monitoring Registers
CERR[1]
CERR[9]
FERR[1]
FERR[9]
1
9
1
9
3.0 Registers
CERR[0]
CERR[8]
FERR[0]
FERR[8]
0
8
0
8
3-49