GS815018AB GSI [GSI Technology], GS815018AB Datasheet - Page 13

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GS815018AB

Manufacturer Part Number
GS815018AB
Description
1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM
Manufacturer
GSI [GSI Technology]
Datasheet
Note:
K is not shown; assumes K tied to V
JTAG Port Operation
Overview
The JTAG Port on this RAM operates in a manner that is compliant with IEEE Standard 1149.1-1990, a serial boundary scan
interface standard (commonly referred to as JTAG). The JTAG Port input interface levels scale with V
drivers are powered by V
Disabling the JTAG Port
It is possible to use this device without utilizing the JTAG port. The port is reset at power-up and will remain inactive unless
clocked. TCK, TDI, and TMS are designed with internal pull-up circuits.To assure normal operation of the RAM with the JTAG
Port unused, TCK, TDI, and TMS may be left floating or tied to either V
Rev: 1.05 10/2005
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
SWx
DQn
SW
SS
ZZ
K
A
KHKH
KHKH
A1
KHKL
KHKL
Read A1
tAVKH
tWVKH
tKHAX
tKHWX
DDQ
KLKH
KLKH
.
A2
Read A2
REF
tEVKH
tKHEX
KHQX1
or out of phase with K
Q1
Deselect
ZZE
Q2
13/25
Clock is a Don't care during Sleep ModeRead A1
Begin ISB
ZZ Timing
DD
or V
SS
. TDO should be left unconnected.
GS815018/36AB-357/333/300/250
ZZR
A1
DD
A2
Read A2
. The JTAG output
© 2003, GSI Technology
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KHQV
Q1
A3
Read A3
KHQX

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