EVAL-AD1928EB AD [Analog Devices], EVAL-AD1928EB Datasheet - Page 21
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EVAL-AD1928EB
Manufacturer Part Number
EVAL-AD1928EB
Description
2 ADC/8 DAC with PLL, 192 kHz, 24-Bit Codec
Manufacturer
AD [Analog Devices]
Datasheet
1.EVAL-AD1928EB.pdf
(32 pages)
OF THE SECOND AD1928
OF THE SECOND AD1928
ADCTDMOUT (TDM_OUT
LRCLK
SDATA
LRCLK
SDATA
LRCLK
SDATA
LRCLK
SDATA
BCLK
BCLK
BCLK
BCLK
ASDATA1 (TDM_IN
IN THE CHAIN)
IN THE CHAIN)
NOTES
1. DSP MODE DOES NOT IDENTIFY CHANNEL.
2. LRCLK NORMALLY OPERATES AT
3. BCLK FREQUENCY IS NORMALLY 64 × LRCLK BUT MAY BE OPERATED IN BURST MODE.
ALRCLK
ABCLK
MSB
AD1928
FIRST
UNUSED UNUSED ADC L1 ADC R1 UNUSED UNUSED ADC L1 ADC R1
UNUSED UNUSED ADC L1 ADC R1
MSB
MSB
SECOND IC IN THE CHAIN
2 ADC CHANNELS OF
SECOND
AD1928
MSB
Figure 22. ADC TDM Daisy-Chain Mode (512 f
LEFT CHANNEL
LEFT CHANNEL
LEFT CHANNEL
f
DSP
S
RIGHT-JUSTIFIED MODE—SELECT NUMBER OF BITS PER CHANNEL
EXCEPT FOR DSP MODE WHICH, IS 2 ×
LEFT-JUSTIFIED MODE—16 BITS TO 24 BITS PER CHANNEL
I
2
S-JUSTIFIED MODE—16 BITS TO 24 BITS PER CHANNEL
LSB
DSP MODE—16 BITS TO 24 BITS PER CHANNEL
FIRST IC IN THE CHAIN
2 ADC CHANNELS OF
LSB
LSB
Figure 23. Stereo Serial Modes
Rev. 0 | Page 21 of 32
LSB
1/
f
S
MSB
S
f
S
BCLK, Two-AD1928 Daisy Chain)
.
MSB
MSB
MSB
32 BITS
MSB
RIGHT CHANNEL
RIGHT CHANNEL
RIGHT CHANNEL
LSB
LSB
LSB
LSB
AD1928