EVAL-AD7923CB2 AD [Analog Devices], EVAL-AD7923CB2 Datasheet - Page 13

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EVAL-AD7923CB2

Manufacturer Part Number
EVAL-AD7923CB2
Description
4-Channel, 200 kSPS, 12-Bit ADC with Sequencer in 16-Lead TSSOP
Manufacturer
AD [Analog Devices]
Datasheet
two address bits indicating which channel the conversion result
corresponds to, followed by the 12 bits of conversion data. For
applications where power consumption is of concern, the power-
down modes should be used between conversions or bursts of
several conversions to improve power performance. See the
Modes of Operation section.
Analog Input Selection
Any one of four analog input channels may be selected for con-
version by programming the multiplexer with the address bits
ADD1 and ADD0 in the Control Register. The channel configu-
rations are shown in Table II.
The AD7923 may also be configured to automatically cycle
through a number of channels as selected. The sequencer fea-
ture is accessed via the SEQ1 and SEQ0 bits in the Control
Register. (See Table IV). The AD7923 can be programmed to
continuously convert on a number of consecutive channels in
ascending order from Channel 0 to a selected final channel as
determined by the channel address bits ADD1 and ADD0. This
is possible if the SEQ1 and SEQ0 bits are set to 1,1. The next
serial transfer will then act on the sequence programmed by
executing a conversion on Channel 0. The next serial transfer
will result in a conversion on Channel 1, and so on, until the
channel selected via the address bits ADD1, ADD0 is reached.
REV. 0
0V TO REF
NOTE: ALL UNUSED INPUT CHANNELS MUST BE CONNECTED TO AGND
0.1 F
IN
Figure 10. Typical Connection Diagram
V
AGND
V
IN
IN
3
0
REF
AV
0V
DD
IN
V
0.1 F
AD7923
AD780
2.5V
10 F
V
DRIVE
SCLK
DOUT
0.1 F
DIN
CS
V
SUPPLY
0.1 F
5V
INTERFACE
10 F
R3
R2
SERIAL
R1
Figure 9. Handling Bipolar Signals
R2
V
R4
R1
REF
R3
SUPPLY
C/ P
3V
R4
–13–
REF
V
V
IN
IN
0
3
AD7923
IN
It is not necessary to write to the Control Register again once a
sequencer operation has been initiated. The WRITE bit must be
set to zero or the DIN line tied low to ensure that the Control
Register is not accidently overwritten, or the sequence operation
interrupted. If the Control Register is written to at any time
during the sequence, the user must ensure that the SEQ1 and
SEQ0 bits are set to 1,0 to avoid interrupting the automatic
conversion sequence. This pattern will continue until the AD7923
is written to and the SEQ1 and SEQ0 bits are configured with
any bit combination except 1,0 resulting in the termination of
the sequence. If uninterrupted, however (WRITE bit = 0, or
WRITE bit = 1 and SEQ1 and SEQ0 bits are set to 1,0), then
upon completion of the sequence, the AD7923 sequencer will
return to the Channel 0 and commence the sequence again.
Regardless of which channel selection method is used, the 16-bit
word output from the AD7923 during each conversion will
always contain two leading zeros, two channel address bits that
the conversion result corresponds to, followed by the 12-bit
conversion result. (See the Serial Interface section.)
Digital Inputs
The digital inputs applied to the AD7923 are not limited by
the maximum ratings that limit the analog inputs. Instead, the
digital inputs applied can go to 7 V and are not restricted by the
AV
Another advantage of SCLK, DIN, and CS not being restricted by
the AV
issues are avoided. If CS, DIN, or SCLK is applied before AV
there is no risk of latch-up as there would be on the analog inputs
if a signal greater than 0.3 V was applied prior to AV
V
The AD7923 also has the V
voltage at which the serial interface operates. V
ADC to easily interface to both 3 V and 5 V processors. For
example, if the AD7923 were operated with an AV
V
has a larger dynamic range with an AV
able to interface to 3 V processors. Care should be taken to
ensure that V
(See the Absolute Maximum Ratings section.)
AV
DRIVE
DRIVE
DD
DD
V
DOUT
DRIVE
+ 0.3 V limit as on the analog inputs.
DD
pin could be powered from a 3 V supply. The AD7923
+ 0.3 V limit is that possible power supply sequencing
COMPLEMENT
–REF
+REF
DRIVE
REF
TWOS
IN
IN
IN
does not exceed AV
(= 2
(= 0V)
REF
DSP/ P
V
V
DRIVE
DD
DD
IN
)
feature. V
011…111
000…000
100…000
DD
DD
of 5 V while still being
by more than 0.3 V.
DRIVE
DRIVE
AD7923
controls the
DD
DD
allows the
of 5 V, the
.
DD
,

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