EVAL-ADAU1401EB AD [Analog Devices], EVAL-ADAU1401EB Datasheet - Page 46

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EVAL-ADAU1401EB

Manufacturer Part Number
EVAL-ADAU1401EB
Description
SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
Manufacturer
AD [Analog Devices]
Datasheet
ADAU1401
SDATA
LRCLK
SDATA
LRCLK
BCLK
BCLK
LRCLK
LRCLK
SDATA
SDATA
BCLK
BCLK
MSB
MSB TDM
CH
0
SLOT 0
BCLKs
32
MSB
LRCLK
BCLK
DATA
MSB
LEFT CHANNEL
LEFT CHANNEL
LEFT CHANNEL
SLOT 1
32 BCLKs
SLOT 1
Figure 33. Right-Justified Mode—16 Bits to 24 Bits per Channel
Figure 32. Left-Justified Mode—16 Bits to 24 Bits per Channel
Figure 31. I
SLOT 2
SLOT 2
LSB
MSB
Figure 35. TDM Mode with Pulse Word Clock
LSB
2
SLOT 3
S Mode—16 Bits to 24 Bits per Channel
MSB–1
Figure 34. TDM Mode
Rev. 0 | Page 46 of 52
SLOT 3
256 BCLKs
LSB
1/F
SLOT 4
MSB–2
S
1/F
1/F
S
S
SLOT 4
MSB
LRCLK
BCLK
DATA
SLOT 5
MSB
SLOT 6
SLOT 5
RIGHT CHANNEL
MSB
RIGHT CHANNEL
SLOT 7
RIGHT CHANNEL
SLOT 6
SLOT 8
LSB
MSB TDM
SLOT 7
LSB
8TH
CH
LSB

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