AM29LV160BT80RWCC AMD [Advanced Micro Devices], AM29LV160BT80RWCC Datasheet - Page 46

• Manufacturer Part Number: AM29LV160BT80RWCC
• Description: 16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
• Manufacturer: AMD [Advanced Micro Devices]

REVISION SUMMARY FOR AM29LV160B
Revision F
Distinctive Characteristics
Changed typical read and program/erase current spec-
ifications.
Device now has a guaranteed minimum endurance of
1,000,000 write cycles.
Figure 1, In-System Sector Protect/Unprotect
Algorithm
Corrected A6 to 0, Changed wait specification to 150
µ
DC Characteristics
Changed typical read and program/erase current spec-
ifications.
AC Characteristics
Alternate CE# Controlled Erase/Program Operations:
Changed t
options.
Erase and Programming Performance
Device now has a guaranteed minimum endurance of
1,000,000 write cycles.
Physical Dimensions
Corrected dimensions for package length and width in
FBGA illustration (standalone data sheet version).
Revision F+1
Table 9, Command Definitions
Corrected the byte-mode address in the sixth write
cycle of the chip erase command sequence to AAAh.
Trademarks
Copyright © 1998 Advanced Micro Devices, Inc. All rights reserved.
AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc.
ExpressFlash is a trademark of Advanced Micro Devices, Inc.
Product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
46
s on sector protect and 15 ms on sector unprotect.
CP
to 35 ns for 70R, 80, and 90 speed
P R E L I M I N A R Y
Am29LV160B
Revision F+2
Figure 1, In-System Sector Protect/Unprotect
Algorithms
In the sector protect algorithm, added a “Reset
PLSCNT=1” box in the path from “Protect another sec-
tor?” back to setting up the next sector address.
DC Characteristics
Changed I
that OE# is at V
AC Characteristics
Erase/Program Operations; Alternate CE# Controlled
Erase/Program Operations: Corrected the notes refer-
ence for t
100% tested. Corrected the note reference for t
This parameter is not 100% tested.
Temporary Sector Unprotect Table
Added note reference for t
100% tested.
Figure 23, Sector Protect/Unprotect Timing
Diagram
A valid address is not required for the first write cycle;
only the data 60h.
Erase and Programming Performance
In Note 2, the worst case endurance is now 1 million cy-
cles.
WHWH1
CC1
test conditions and Note 1 to indicate
IH
and t
for the listed current.
WHWH2
VIDR
. These parameters are
. This parameter is not
VCS
.