AM29LV2562M AMD [Advanced Micro Devices], AM29LV2562M Datasheet
AM29LV2562M
Related parts for AM29LV2562M
AM29LV2562M Summary of contents
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... Data Sheet This product has been retired and is not available for designs. For new and current designs, S29GL512N supersedes Am29LV2562M and is the factory-recommended migration path. Please refer to the S29GL512N Data Sheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. ...
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... Flash Memory with VersatileI/O™ Control This product has been retired and is not available for designs. For new and current designs, S29GL512N supersedes Am29LV2562M and is the factory-recommended migration path. Please refer to the S29GL512N Data Sheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only ...
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... GENERAL DESCRIPTION The Am29LV2562M consists of two 256 Mbit, 3.0 volt single power supply flash memory devices and is or- ganized as 16,777,216 doublewords or 33,554,432 words. The device has a 32-bit wide data bus that can also function as an 16-bit wide data bus by using the WORD# input. The device can be programmed either in the host system or in standard EPROM program- mers ...
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... Alternate CE# Controlled Erase and Program Operations ..... 60 Figure 24. Alternate CE# Controlled Write (Erase/Program) Operation Timings .......................................................................... 61 Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 61 Erase And Programming Performance TSOP Pin and BGA Package Capacitance . . . . . 62 Data Retention Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 63 LSC080–80-Ball Fortified Ball Grid Array Package .............................................................. 63 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 64 Am29LV2562M ) ......... 41 IH ).......... ...
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... Note:In x16 Mode, DQ31 and DQ23 must be connected together on the board – 3.6 V, – 3.6V 256 Mbit Flash Memory DQ23/A-1 to DQ16; DQ7-DQ0 #1 X16 X16 256 Mbit DQ32/A-1 to DQ24; DQ15 TO DQ8 Flash Memory #2 Am29LV2562M Am29LV2562M 120R 120 120 30 30 DQ31 to DQ0 X32 December 16, 2005 ...
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... Note:In x16 Mode, DQ31 and DQ23 must be connected together on the board. December 16, 2005 Sector Switches Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer X-Decoder Am29LV2562M – DQ31 DQ0 (A-1) V Input/Output IO Buffers Data STB Latch Y-Gating Cell Matrix 5 ...
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... DQ0 DQ8 CE RFU RFU RFU V IO exposed to temperatures above 150°C for prolonged periods of time. Am29LV2562M RFU DQ29 DQ22 DQ15 DQ20 DQ13 DQ6 DQ27 DQ4 DQ26 ...
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... IH , data is IL WP#/ACC V CC RESET# NC x32 Mode 24 16 Am29LV2562M = Device ground = Ready/Busy output and open drain. When RY/BY the device is ready to ac- OH cept read operations and commands. When RY/BY the device is either OL executing an embedded algorithm or the device is executing a hardware reset oper- ation. ...
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... Valid Combinations list configurations planned to be sup- ported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and Spee to check on newly released combinations Range Range (ns) 3.0– 1.65– 120 3.6 V 3.6 V Am29LV2562M ) IL Valid Combinations December 16, 2005 ...
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... DQ31 pins are used as inputs for the LSB (A-1) ad- dress function. VersatileIO The VersatileIO to set the voltage levels that the device generates and tolerates on CE# and DQ I/Os to the same voltage level that is asserted on V for V options on this device. IO Am29LV2562M DQ31–DQ16 DQ15– WORD# WORD# DQ0 = ...
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... OE# input. The device enters the CMOS standby mode when the CE# and RESET# pins are both held at V (Note that this is a more restricted voltage range than Am29LV2562M AC Char- section contains timing specification tables on this pin, the device auto- ...
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... Flash memory. Refer to the rameters and to Figure 15 for the timing diagram. Output Disable Mode When the OE# input disabled. The output pins are placed in the high impedance state. Am29LV2562M ±0.3 V, the device RESET# is held CC4 ±0.3 V, the standby current will SS ...
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... Am29LV2562M 16-bit 32-bit Address Range Address Range (in hexadecimal) (in hexadecimal) 0000000–000FFFF 000000–007FFF 0010000–001FFFF 008000–00FFFF 0020000–002FFFF 010000–017FFF 0030000–003FFFF 018000–01FFFF 0040000–004FFFF 020000–027FFF 0050000–005FFFF 028000–02FFFF 0060000–006FFFF 030000– ...
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... Am29LV2562M 16-bit 32-bit Address Range Address Range (in hexadecimal) (in hexadecimal) 02C0000–02CFFFF 160000–167FFF 02D0000–02DFFFF 168000–16FFFF 02E0000–02EFFFF 170000–177FFF 02F0000–02FFFFF 178000–17FFFF 0300000–030FFFF 180000–187FFF 0310000–031FFFF 188000–18FFFF 0320000–032FFFF 190000– ...
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... Am29LV2562M 16-bit 32-bit Address Range Address Range (in hexadecimal) (in hexadecimal) 0580000–058FFFF 2C0000–2C7FFF 0590000–059FFFF 2C8000–2CFFFF 05A0000–05AFFFF 2D0000–2D7FFF 05B0000–05BFFFF 2D8000–2DFFFF 05C0000–05CFFFF 2E0000–2E7FFF 05D0000–05DFFFF 2E8000–2EFFFF 05E0000–05EFFFF 2F0000– ...
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... Am29LV2562M 16-bit 32-bit Address Range Address Range (in hexadecimal) (in hexadecimal) 0840000–084FFFF 420000–427FFF 0850000–085FFFF 428000–42FFFF 0860000–086FFFF 430000–437FFF 0870000–087FFFF 438000–43FFFF 0880000–088FFFF 440000–447FFF 0890000–089FFFF 448000–44FFFF 08A0000–08AFFFF 450000– ...
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... Am29LV2562M 16-bit 32-bit Address Range Address Range (in hexadecimal) (in hexadecimal) 0B00000–0B0FFFF 580000–587FFF 0B10000–0B1FFFF 588000–58FFFF 0B20000–0B2FFFF 590000–597FFF 0B30000–0B3FFFF 598000–59FFFF 0B40000–0B4FFFF 5A0000–5A7FFF 0B50000–0B5FFFF 5A8000–5AFFFF 0B60000–0B6FFFF 5B0000– ...
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... Am29LV2562M 16-bit 32-bit Address Range Address Range (in hexadecimal) (in hexadecimal) 0DC0000–0DCFFFF 6E0000–6E7FFF 0DD0000–0DDFFFF 6E8000–6EFFFF 0DE0000–0DEFFFF 6F0000–6F7FFF 0DF0000–0DFFFFF 6F8000–6FFFFF 0E00000–0E0FFFF 700000–707FFF 0E10000–0E1FFFF 708000–70FFFF 0E20000–0E2FFFF 710000– ...
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... Am29LV2562M 16-bit 32-bit Address Range Address Range (in hexadecimal) (in hexadecimal) 1080000–108FFFF 840000–847FFF 1090000–109FFFF 848000–84FFFF 10A0000–10AFFFF 850000–857FFF 10B0000–10BFFFF 858000–85FFFF 10C0000–10CFFFF 860000–867FFF 10D0000–10DFFFF 868000–86FFFF 10E0000–10EFFFF 870000– ...
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... Am29LV2562M 16-bit 32-bit Address Range Address Range (in hexadecimal) (in hexadecimal) 1340000–134FFFF 9A0000–9A7FFF 1350000–135FFFF 9A8000–9AFFFF 1360000–136FFFF 9B0000–9B7FFF 1370000–137FFFF 9B8000–9BFFFF 1380000–138FFFF 9C0000–9C7FFF 1390000–139FFFF 9C8000–9CFFFF 13A0000–13AFFFF 9D0000– ...
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... Am29LV2562M 16-bit 32-bit Address Range Address Range (in hexadecimal) (in hexadecimal) 1600000–160FFFF B00000–B07FFF 1610000–161FFFF B08000–B0FFFF 1620000–162FFFF B10000–B17FFF 1630000–163FFFF B18000–B1FFFF 1640000–164FFFF B20000–B27FFF 1650000–165FFFF B28000–B2FFFF 1660000–166FFFF B30000– ...
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... Am29LV2562M 16-bit 32-bit Address Range Address Range (in hexadecimal) (in hexadecimal) 18C0000–18CFFFF C60000–C67FFF 18D0000–18DFFFF C68000–C6FFFF 18E0000–18EFFFF C70000–C77FFF 18F0000–18FFFFF C78000–C7FFFF 1900000–190FFFF C80000–C87FFF 1910000–191FFFF C88000–C8FFFF 1920000–192FFFF C90000– ...
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... Am29LV2562M 16-bit 32-bit Address Range Address Range (in hexadecimal) (in hexadecimal) 1B80000–1B8FFFF DC0000–DC7FFF 1B90000–1B9FFFF DC8000–DCFFFF 1BA0000–1BAFFFF DD0000–DD7FFF 1BB0000–1BBFFFF DD8000–DDFFFF 1BC0000–1BCFFFF DE0000–DE7FFF 1BD0000–1BDFFFF DE8000–DEFFFF 1BE0000–1BEFFFF DF0000– ...
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... Am29LV2562M 16-bit 32-bit Address Range Address Range (in hexadecimal) (in hexadecimal) 1E40000–1E4FFFF F20000–F27FFF 1E50000–1E5FFFF F28000–F2FFFF 1E60000–1E6FFFF F30000–F37FFF 1E70000–1E7FFFF F38000–F3FFFF 1E80000–1E8FFFF F40000–F47FFF 1E90000–1E9FFFF F48000–F4FFFF 1EA0000–1EAFFFF F50000– ...
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... Sector Address Don’t care. IH Am29LV2562M 10 and 11. This . Refer to the Autoselect ID section for more information. DQ23 to DQ16 A0 DQ7 to DQ0 WORD# WORD 01h 7Eh ...
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... SA216–SA219 0001010xx SA220–SA223 0001011xx SA224–SA227 0001100xx SA228–SA231 0001101xx SA232–SA235 0001110xx SA236–SA239 0001111xx SA240–SA243 0010000xx SA244–SA247 Am29LV2562M A23–A15 0010001xx 0010010xx 0010011xx 0010100xx 0010101xx 0010110xx 0010111xx 0011000xx 0011001xx 0011010xx 0011011xx 0011100xx 0011101xx 0011110xx ...
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... Am29LV2562M A23–A15 1101011xx 1101100xx 1101101xx 1101110xx 1101111xx 1110000xx 1110001xx 1110010xx 1110011xx 1110100xx 1110101xx 1110110xx 1110111xx 1111000xx 1111001xx 1111010xx 1111011xx 1111100xx ...
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... Notes: 1. All protected sector groups unprotected (If WP the first or last sector will remain protected). 2. All previously protected sector groups are protected once again. Figure 1. Temporary Sector Group Unprotect Operation Am29LV2562M START RESET (Note 1) Perform Erase or Program Operations RESET ...
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... Reset PLSCNT = 1 Increment PLSCNT No Yes PLSCNT = 1000? Yes Device failed Sector Group Unprotect Algorithm Am29LV2562M START PLSCNT = 1 RESET Wait 1 μs Temporary Sector No First Write Group Unprotect Cycle = 60h? Mode Yes All sector No groups ...
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... Sector, follow the algorithm shown in Figure 3. Once the SecSi Sector is programmed, locked and verified, the system must write the Exit SecSi Sector Region command sequence to return to reading and writing within the remainder of the array. Am29LV2562M To reduce power consumption This IH ID ...
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... For further information, please refer to the CFI Specifi- cation and CFI Publication 100, available via the World Wide Web at http://www.amd.com/flash/cfi. Alterna- tively, contact an AMD representative for copies of these documents. Am29LV2562M , the device does not ac- LKO is greater than V CC LKO ...
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... Max. timeout for byte/word write 2 times typical N Max. timeout for buffer write 2 times typical Max. timeout per individual block erase 2 N Max. timeout for full chip erase 2 times typical (00h = not supported) Am29LV2562M Description Description N µs N µ s (00h = not supported ...
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... Number of Erase Block Regions within device (01h = uniform device, 02h = boot device) Erase Block Region 1 Information (refer to the CFI specification or CFI publication 100) Erase Block Region 2 Information (refer to CFI publication 100) Erase Block Region 3 Information (refer to CFI publication 100) Erase Block Region 4 Information (refer to CFI publication 100) Am29LV2562M N December 16, 2005 ...
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... ACC (Acceleration) Supply Maximum 00h = Not Supported, D7-D4: Volt, D3-D0: 100 mV Top/Bottom Boot Sector Flag 00h = Uniform Device without WP# protect, 02h = Bottom Boot Device, 03h = Top Boot Device, 04h = Uniform sectors bottom WP# protect, 05h = Uniform sectors top WP# protect Program Suspend 00h = Not Supported, 01h = Supported Am29LV2562M 33 ...
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... A read cycle to an address containing a sector ad- dress (SA), and the address 02h on A7–A0 in dou- bleword mode returns 0101h if the sector is protected, or 0000h unprotected. The system must write the reset command to return to the read mode (or erase-suspend-read mode if the de- vice was previously in Erase Suspend). Am29LV2562M December 16, 2005 ...
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... Write buffer locations may be loaded in any order. The write-buffer-page address must be the same for all address/data pairs loaded into the write buffer. (This means Write Buffer Programming cannot be per- formed across multiple write-buffer pages. This also Am29LV2562M 10 and 11 show the re- ...
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... WP# has an internal pullup; when un- connected, WP Figure 5 illustrates the algorithm for the program oper- ation. Refer to the table in the AC Characteristics section for parameters, and Figure 16 for timing diagrams. Am29LV2562M pair to a different for operations HH ...
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... Yes No 4. Yes Yes No PASS Am29LV2562M When Sector Address is specified, any address in the selected sector is acceptable. However, when loading Write-Buffer address locations with data, all addresses must fall within the selected Write-Buffer Page. DQ5 and DQ13. Therefore, DQ7 and DQ15 should be verified. ...
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... Program Suspend mode and continue the programming opera- tion. Further writes of the Resume command are ig- nored. Another Program Suspend command can be written after the device has resume programming. Am29LV2562M Write Opera- for more information. December 16, 2005 ...
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... Erase Suspend during the time-out period resets the device to the read mode. The system must re- write the command sequence and any additional ad- dresses and commands. Note that the SecSi Sector, autoselect, and CFI functions are unavailable when an erase operation in is progress. Am29LV2562M Write Op- ta- 39 ...
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... To resume the sector erase operation, the system must write the Erase Resume command. Further writes of the Resume command are ignored. Another Erase Suspend command can be written after the chip has resumed erasing. Am29LV2562M Write Op- section for information on these status Write Operation Status and ...
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... The Erase Suspend command is valid only during a sector erase Autoselect operation. 17. The Erase Resume command is valid only during the Erase Suspend mode. 18. Command is valid when device is ready to read array data or when device is in autoselect mode. Am29LV2562M ) IH Fourth Fifth Sixth Addr Data ...
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... The Erase Suspend command is valid only during a sector erase Autoselect operation. 17. The Erase Resume command is valid only during the Erase Suspend mode. 18. Command is valid when device is ready to read array data or when device is in autoselect mode. Am29LV2562M ) IL Fourth Fifth Sixth Addr Data ...
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... During chip erase, a valid address is any non-protected sector address. 2. DQ7 and DQ15 should be rechecked even if DQ5 and/or DQ13 = “1” because DQ7 and DQ15 may change simultaneously with DQ5 and DQ13. Figure 7. Data# Polling Algorithm Am29LV2562M AC Characteristics section Yes No Yes ...
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... Note: The system should recheck the toggle bit even if DQ5 and DQ13= “1” because the toggle bit may stop toggling as DQ5 and DQ13 changes to “1.” See the subsections on DQ6 and DQ14 and DQ2 and DQ10 for more information. Figure 8. Toggle Bit Algorithm Am29LV2562M DQ2 and No Yes Yes No ...
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... To ensure the command has been accepted, the system software should check the status of DQ3 and DQ11 prior to and following each subsequent sec- tor erase command. If DQ3 and DQ11 are high on the Am29LV2562M section. 45 ...
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... Table 12. Write Operation Status DQ5/ DQ7/DQ15 DA13 (Note 2) DQ6/DQ14 (Note 1) DQ7/DA15# Toggle 0 0 Toggle 0 Invalid (not allowed) Data 1 No toggle 0 Data DQ7/DQ15# Toggle 0 DQ7/DQ15# Toggle 0 DQ7/DQ15# Toggle 0 Am29LV2562M Write Buffer section for more details. DQ3/ DQ2/DQ10 DQ1/ DQ11 (Note 2) DQ9 RY/BY# N/A No toggle 0 1 Toggle N/A N/A Toggle N/A N/A N/A N/A N/A N/A 0 N/A N/A 1 ...
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... The I/Os will not operate when V December 16, 2005 +0.8 V –0.5 V –2.0 V +0.5 V Figure +0 –2.0 V for SS Figure 10 Am29LV2562M Maximum Negative Overshoot Waveform Maximum Positive Overshoot Waveform 47 ...
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... Automatic sleep mode enables the low power mode when addresses remain stable for < maximum Maximum max voltage requirements voltage requirements Not 100% tested Am29LV2562M Min Typ Max ±2.0 70 ±2 MHz MHz MHz 8 100 10 MHz 80 160 ...
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... Note) Output timing measurement reference levels INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Measurement Level Figure 12. Input Waveforms and Measurement Levels Am29LV2562M All Speeds Unit 1 TTL gate 0.0–3 ...
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... Toggle and Data# Polling = V . Contact AMD for information on AC operation when Addresses Stable t ACC OEH t CE HIGH Z Figure 13. Read Operation Timings Am29LV2562M Speed Options 120R Min 120 Max 120 IL Max 120 IL Max 30 Max 30 Max 25 Max 25 Min 0 Min 0 ...
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... AC CHARACTERISTICS A23-A2 A1-A0* Data Bus CE# OE# * Figure shows doubleword mode. Addresses are A1–A-1 for word mode. December 16, 2005 Same Page PACC PACC t ACC Qa Qb Figure 14. Page Read Timings Am29LV2562M PACC ...
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... Contact AMD for information on AC operation when Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready t RP Figure 15. Reset Timings Am29LV2562M All Speed Options Unit 20 µs 500 ns 500 µs ≠ ...
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... AC specifications listed are tested with V December 16, 2005 Per Word Per Doubleword Per Word Per Doubleword Word Doubleword Word Doubleword = V . Contact AMD for information on AC operation when Am29LV2562M 120R Unit Min 120 ns Min 0 ns Min 15 ns Min 45 ns ...
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... WPH A0h t BUSY is the true data at the program address. OUT Figure 16. Program Operation Timings Am29LV2562M Read Status Data (last two cycles WHWH1 Status D OUT VHH December 16, 2005 ...
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... These waveforms are for the doubleword mode. Figure 18. Chip/Sector Erase Operation Timings December 16, 2005 555h for chip erase WPH t DH 30h 10 for Chip Erase t BUSY Am29LV2562M Read Status Data WHWH2 In Complete Progress ...
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... Note Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data read cycle. Figure 19. Data# Polling Timings (During Embedded Algorithms Complement Complement True Status Data Status Data Am29LV2562M VA High Z Valid Data High Z True Valid Data December 16, 2005 ...
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... AHT AS t AHT t ASO t CEPH t OEPH t OE Valid Valid Status Status (first read) (second read) Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure 21. DQ2 vs. DQ6 Am29LV2562M Valid Valid Data Status (stops toggling) Erase Resume Erase Erase Complete Read 57 ...
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... CE# WE# RY/BY# Figure 22. Temporary Sector Group Unprotect Timing Diagram Min Min = V . Contact AMD for information on AC operation when Program or Erase Command Sequence t RSP Am29LV2562M All Speed Options Unit 500 ns 4 µs ≠ ...
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... For sector group protect For sector group unprotect Figure 23. Sector Group Protect and Unprotect Timing Diagram December 16, 2005 Valid* Valid* Verify 60h 40h Sector Group Protect: 150 µs, Sector Group Unprotect Am29LV2562M Valid* Status 59 ...
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... AC specifications listed are tested with Per Word Per Doubleword Per Word Per Doubleword Word Doubleword Word Doubleword = V . Contact AMD for information on AC operation when Am29LV2562M 120R Unit Min 120 ns Min 0 ns Min 45 ns Min 45 ns ...
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... CPH t BUSY for program PD for program 55 for erase 30 for sector erase 10 for chip erase is the data written to the device. OUT Operation Timings Min –1.0 V –1.0 V –100 mA = 3.0 V, one pin at a time. CC Am29LV2562M PA DQ7# D OUT Max 12 1 +100 mA 61 ...
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... Per Word 6.25 Per Doubleword 12.5 252 584 = 3.0 V, 100,000 cycles. CC Test Setup OUT Am29LV2562M Unit Comments 3.5 sec Excludes 00h programming prior to erasure (Note 5) sec µs µs µs µs µs Excludes system level 38 µs overhead (Note 6) 75 µs µs 33 µ ...
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... OUTER ROW 0.000. WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW e/2 8. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. Am29LV2562M ...
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... Operation, Accelerated Effective Write Buffer Program Operation, Sector Erase Operation, Single , and V from Doubleword/Word Program Operation, Accelerated and Single Doubleword/Word Program Operation (the IH2 OL OH1 phrase “Single Doubleword/Word” was added to the last two parameter titles). Am29LV2562M CC1 . CC3 December 16, 2005 , I , CC2 ...
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... This product has been retired and is not available for designs. For new and current designs, S29GL512N supersedes Am29LV2562M and is the factory-recom S29GL512N Data Sheet for specifications and order- ing information ...