AM29LV256MH110PGF AMD [Advanced Micro Devices], AM29LV256MH110PGF Datasheet
AM29LV256MH110PGF
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AM29LV256MH110PGF Summary of contents
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Data Sheet This product has been retired and is not available for designs. For new and current designs, S29GL256N supersedes Am29LV256M and is the factory-recommended migration path. Please refer to the S29GL256N datasheet for specifications and ordering information. Availability of ...
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Am29LV256M 256 Megabit ( 16-Bit/ 8-Bit) MirrorBit Uniform Sector Flash Memory with VersatileI/O This product has been retired and is not available for designs. For new and current designs, S29GL256N supersedes Am29LV256M and is the factory-recommended ...
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GENERAL DESCRIPTION The Am29LV256M is a 256 Mbit, 3.0 volt single power supply flash memory devices organized as 16,777,216 words or 33,554,432 bytes. The device has a 16-bit wide data bus that can also function as an 8-bit wide data ...
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TABLE OF CONTENTS Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4 Block Diagram . . . . . . . . . . ...
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PRODUCT SELECTOR GUIDE Part Number Regulated Voltage Range V = 3.0–3 Speed/ Voltage Option Full Voltage Range V = 2.7–3 Max. Access Time (ns) Max. CE# Access Time (ns) Max. Page access time (t ) PACC ...
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CONNECTION DIAGRAMS A23 1 A22 2 A15 3 A14 4 A13 5 A12 6 A11 7 A10 A19 11 A20 12 WE RESET# A21 15 WP#/ACC 16 RY/BY# 17 A18 18 A17 19 ...
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CONNECTION DIAGRAMS A22 A7 B7 A13 A12 WE# RESET RY/BY# WP#/ACC A17 SPECIAL PACKAGE HANDLING INSTRUCTIONS Special ...
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PIN DESCRIPTION A23– Address inputs DQ14–DQ0 = 15 Data inputs/outputs DQ15/A-1 = DQ15 (Data input/output, word mode), A-1 (LSB Address input, byte mode) CE# = Chip Enable input OE# = Output Enable input WE# = Write Enable input ...
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ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: Am29LV256M H 123R PG DEVICE NUMBER/DESCRIPTION Am29LV256MH/L 256 Megabit ( ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is a latch ...
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For example 1.65–3.6 volts allows for I/O at I/O the 1 volt levels, driving and receiving signals to and from other 1 devices on the same data bus. Requirements for Reading Array ...
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OE# input. The device enters the CMOS standby mode when the CE# and RESET# pins are both held at V (Note that this is a more restricted ...
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Sector A23–A15 SA0 SA1 SA2 SA3 SA4 SA5 SA6 0 ...
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Table 2. Sector Address Table (Continued) Sector A23–A15 SA47 SA48 SA49 SA50 SA51 SA52 0 ...
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Table 2. Sector Address Table (Continued) Sector A23–A15 SA95 SA96 SA97 SA98 SA99 SA100 0 ...
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Table 2. Sector Address Table (Continued) Sector A23–A15 SA143 SA144 SA145 SA146 SA147 SA148 0 ...
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Table 2. Sector Address Table (Continued) Sector A23–A15 SA191 SA192 SA193 SA194 SA195 SA196 0 ...
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Table 2. Sector Address Table (Continued) Sector A23–A15 SA239 SA240 SA241 SA242 SA243 SA244 0 ...
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Table 2. Sector Address Table (Continued) Sector A23–A15 SA287 SA288 SA289 SA290 SA291 SA292 1 ...
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Table 2. Sector Address Table (Continued) Sector A23–A15 SA335 SA336 SA337 SA338 SA339 SA340 1 ...
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Table 2. Sector Address Table (Continued) Sector A23–A15 SA383 SA384 SA385 SA386 SA387 SA388 1 ...
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Table 2. Sector Address Table (Continued) Sector A23–A15 SA431 SA432 SA433 SA434 SA435 SA436 1 ...
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Table 2. Sector Address Table (Continued) Sector A23–A15 SA479 SA480 SA481 SA482 SA483 SA484 1 ...
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Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector group protection verifica- tion, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equipment to automatically match a device to be pro- grammed ...
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Sector Group Protection and Unprotection The hardware sector group protection feature disables both program and erase operations in any sector group. The hardware sector group unprotection fea- ture re-enables both program and erase operations in previously protected sector groups. Sector ...
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Sector Group SA248–SA251 SA252–SA255 SA256–SA259 SA260–SA263 SA264–SA267 SA268–SA271 SA272–SA275 SA276–SA279 SA280–SA283 SA284–SA287 SA288–SA291 SA292–SA295 SA296–SA299 SA300–SA303 SA304–SA307 SA308–SA311 SA312–SA315 SA316–SA319 SA320–SA323 SA324–SA327 SA328–SA331 SA332–SA335 SA336–SA339 SA340–SA343 SA344–SA347 SA348–SA351 SA352–SA355 SA356–SA359 SA360–SA363 SA364–SA367 SA368–SA371 SA372–SA375 SA376–SA379 SA380–SA383 SA384–SA387 SA388–SA391 SA392–SA395 SA396–SA399 ...
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Write Protect (WP#) The Write Protect function provides a hardware method of protecting the first or last sector without using V . Write Protect is one of two functions pro- ID vided by the WP#/ACC input. If the system asserts ...
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START PLSCNT = 1 RESET Wait 1 μs Temporary Sector No First Write Group Unprotect Cycle = 60h? Mode Yes Set up sector group address Sector Group Protect: Write 60h to sector group address with A6 = ...
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SecSi (Secured Silicon) Sector Flash Memory Region The SecSi (Secured Silicon) Sector feature provides a Flash memory region that enables permanent part identification through an Electronic Serial Number (ESN). The SecSi Sector is 256 bytes in length, and uses a ...
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START If data = 00h, RESET# = SecSi Sector unprotected. If data = 01h, SecSi Sector is Wait 1 μs protected. Write 60h to any address Remove V from RESET# Write 40h to SecSi ...
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Addresses (x16) Data 10h 0051h 11h 0052h 12h 0059h 13h 0002h 14h 0000h 15h 0040h 16h 0000h 17h 0000h 18h 0000h 19h 0000h 1Ah 0000h Addresses (x16) Data 1Bh 0027h 1Ch 0036h 1Dh 0000h 1Eh 0000h 1Fh 0007h 20h 0007h ...
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Addresses (x16) Data 27h 0019h 28h 0002h 29h 0000h 2Ah 0005h 2Bh 0000h 2Ch 0001h 2Dh 00FFh 2Eh 0001h 2Fh 0000h 30h 0001h 31h 0000h 32h 0000h 33h 0000h 34h 0000h 35h 0000h 36h 0000h 37h 0000h 38h 0000h 39h ...
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Table 9. Primary Vendor-Specific Extended Query Addresses (x16) Data 40h 0050h 41h 0052h 42h 0049h 43h 0031h 44h 0033h 45h 0008h 46h 0002h 47h 0001h 48h 0001h 49h 0004h 4Ah 0000h 4Bh 0000h 4Ch 0001h 4Dh 00B5h 4Eh 00C5h 0004h/ ...
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After completing a pro- gramming operation in the Erase Suspend mode, the system may once again read array data with the same exception. See the Erase Suspend/Erase Resume Commands section for more information. The system must issue the ...
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When the Embedded Program algorithm is complete, the device then returns to the read mode and ad- dresses are no longer latched. The system can deter- mine the status of ...
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Load a value that is greater than the page buffer size during the Number of Locations to Program step. Write to an address in a sector different than the one specified during the Write-Buffer-Load com- mand. Write an Address/Data pair ...
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Write “Write to Buffer” command and Sector Address Write number of addresses to program minus 1(WC) and Sector Address Write first address/data Yes Abort Write to Buffer Operation? Write next address/data pair (Note ...
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Write Program Command Sequence Data Poll from System Embedded Program algorithm in progress Verify Data? No Increment Address Last Address? Programming Completed Note: See Tables 11 and 12 for program command sequence. Figure 5. Program Operation December 16, 2005 D ...
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Program Operation or Write-to-Buffer Sequence in Progress Write Program Suspend Write address/data Command Sequence XXXh/B0B0h Command is also valid for Erase-suspended-program operations Wait 15 ms Autoselect and SecSi Sector Read data as read operations are also allowed required Data cannot ...
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WE# pulse in the command sequence. When the Embedded Erase algorithm is complete, the device returns to reading array data and addresses are no longer latched. The system can determine the status of the erase ...
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Command Definitions Table 11. Command Definitions (x16 Mode, BYTE Command Sequence (Note 1) Addr Read (Note 6) 1 Reset (Note 7) 1 Manufacturer ID 4 Device ID (Note SecSi Sector Factory Protect 4 (Note 10) ...
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Table 12. Command Definitions (x8 Mode, BYTE Command Sequence (Note 1) Addr Read (Note 6) 1 Reset (Note 7) 1 Manufacturer ID 4 Device ID (Note SecSi Sector Factory Protect 4 (Note 10) Sector Group ...
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WRITE OPERATION STATUS The device provides several bits to determine the status of a program or erase operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 13 and the following subsections describe the function of these bits. DQ7 and DQ6 each ...
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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin which indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...
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START Read DQ7–DQ0 Read DQ7–DQ0 No Toggle Bit = Toggle? Yes No DQ5 = 1? Yes Read DQ7–DQ0 Twice Toggle Bit No = Toggle? Yes Program/Erase Operation Not Complete, Write Operation Complete Reset Command Note: The system should recheck the ...
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In this case, the system must start at the beginning of the algorithm when it returns to de- termine the status of the operation (top of DQ5: Exceeded Timing Limits DQ5 indicates whether the program, erase, or ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied ...
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DC CHARACTERISTICS CMOS Compatible Parameter Parameter Description Symbol (Notes) I Input Load Current ( A9, ACC Input Load Current LIT I Output Leakage Current LO I Reset Leakage Current LR V Active Read Current CC I CC1 (2, ...
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TEST CONDITIONS Device Under Test C 6.2 kΩ L Note: Diodes are IN3064 or equivalent. Figure 11. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 V Input 0.0 V Note < ...
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AC CHARACTERISTICS Read-Only Operations Parameter JEDEC Std. Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV CE t Page Access Time PACC t ...
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AC CHARACTERISTICS AMax-A3 A2-A0* Data Bus CE# OE# * Figure shows word mode. Addresses are A1–A-1 for byte mode Same Page PACC PACC t ACC Qa ...
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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std. RESET# Pin Low (During Embedded Algorithms) t Ready to Read Mode (See Note) RESET# Pin Low (NOT During Embedded t Ready Algorithms) to Read Mode (See Note) t RESET# Pulse Width RP ...
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AC CHARACTERISTICS Erase and Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL AS t Address Setup Time to OE# low during toggle bit polling ASO t t ...
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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY VCS Notes program address program data Illustration shows device in word ...
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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE Data RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid Address for ...
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AC CHARACTERISTICS Addresses t POLL CE OE# t OEH WE# DQ15 and DQ7 DQ14–DQ8, DQ6–DQ0 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data ...
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AC CHARACTERISTICS Addresses CE# t OEH WE# OE Valid Data DQ6 & DQ14/ DQ2 & DQ10 RY/BY# Note Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read ...
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AC CHARACTERISTICS Temporary Sector Unprotect Parameter JEDEC Std Description t V Rise and Fall Time (See Note) VIDR ID RESET# Setup Time for Temporary Sector t RSP Unprotect Note: Not 100% tested RESET ...
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AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Group Protect or Unprotect Data 6060h 1 µs CE# WE# OE# * For sector group protect For sector group ...
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AC CHARACTERISTICS Alternate CE# Controlled Erase and Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time ELAX Data Setup ...
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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes: 1. Figure indicates last two bus cycles of a program or erase operation ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Single Byte/Word Program Time (Note 3) Word Accelerated Single Byte/Word Byte Program Time Word (Note 3) Total Write Buffer Program Time (Note 4) Per Byte Effective Write Buffer ...
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DATA RETENTION Parameter Description Minimum Pattern Data Retention Time Test Conditions 150°C 125°C Am29LV256M Min Unit 10 Years 20 Years December 16, 2005 ...
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PHYSICAL DIMENSIONS TS056/TSR056—56-Pin Standard/Reverse Thin Small Outline Package (TSOP) PACKAGE TS/TSR 56 JEDEC MO-142 (B) EC SYMBOL MIN. NOM. MAX. A --- --- 1.20 A1 0.05 --- 0.15 A2 0.95 1.00 1.05 b1 0.17 0.20 0.23 b 0.17 0.22 0.27 ...
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PHYSICAL DIMENSIONS LAC064—64-Ball Fortified Ball Grid Array Package D 0. CORNER ID. (INK OR LASER) 1.00±0.5 TOP VIEW A1 CORNER SIDE VIEW PACKAGE LAC 064 JEDEC N/A 18. ...
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REVISION SUMMARY Revision A (August 3, 2001) Initial release as abbreviated Advance Information data sheet. Revision A+1 (September 12, 2001) Ordering Information Changed package part number designation from WH to PC. Physical Dimensions Added the TS056 and LAA064 packages. Revision ...
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Table 4. SecSi Sector Contents Added x8 and x16 Operating Ranges Changed the V supply range to 1.65–3 Erase and Programming Performance Changed the typicals and/or maximums of Chip Erase Time, Effective Write Buffer Program Time, and Pro- ...
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Revision C+1 (May 28, 2003) Global Converted to full datasheet version. Modified SecSi Sector Flash Memory Region section to include ESN references. Erase and Programming Performance Input values into table that were previously TBD. Modified notes. CMOS Compatible Corrected typos ...