AM29LV640MH SPANSION [SPANSION], AM29LV640MH Datasheet
AM29LV640MH
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AM29LV640MH Summary of contents
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Data Sheet This product has been retired and is not available for designs. For new and current designs, S29GL064A supersedes Am29LV640M H/L and is the factory-recommended migration path. Please refer to the S29GL064A datasheet for specifications and ordering information. Availability ...
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... Am29LV640MH/L 64 Megabit ( 16-Bit 8-Bit) MirrorBit™ 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O™ Control This product has been retired and is not available for designs. For new and current designs, S29GL064A supersedes Am29LV640M H/L and is the factory-recommended migration path. Please refer to the S29GL064A datasheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. ...
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... GENERAL DESCRIPTION The Am29LV640MH Mbit, 3.0 volt single power supply flash memory device organized as 4,194,304 words or 8,388,608 bytes. The device has an 8-bit/16-bit bus and can be programmed either in the host system or in standard EPROM programmers. An access time of 90, 100, 110, or 120 ns is available. ...
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... Fine-Pitch BGA Implementing a Common Layout for AMD MirrorBit → Prod- and Intel StrataFlash Memory Devices → Tech- Migrating from Single-byte to Three-byte Device IDs AMD MirrorBit™ White Paper Am29LV640MH/L RY/BY# WP#, ACC WP# Protection Yes ACC only No WP Kbyte Yes WP#/ACC pin ...
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... Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 56 TSOP Pin and BGA Package Capacitance . . . . . 56 Data Retention Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 57 TS056/TSR056—56-Pin Standard and Reverse Pinout Thin Small Outline Package (TSOP) ...................................... 57 LAA064—64-Ball Fortified Ball Grid Array (FBGA Package .................................................................................. 58 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 59 Am29LV640MH/L ) ............................ 33 IH )............................... 34 IL December 14, 2005 ...
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... Max. Page access time PACC Max. OE# Access Time (ns) 25 Notes: 1. See “AC Characteristics” for full specifications. 2. For the Am29LV640MH-L device, the last numeric digit in the speed option (e.g. 101, 112, 120) is used for internal BLOCK DIAGRAM RY/BY RESET# WE# ...
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... DQ10 17 DQ2 18 DQ9 19 DQ1 20 DQ8 21 DQ0 56-Pin Standard TSOP 56-Pin Reverse TSOP Am29LV640MH A16 53 BYTE DQ15/A-1 50 DQ7 49 DQ14 48 DQ6 47 DQ13 46 DQ5 45 DQ12 44 DQ4 ...
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... DQ0 DQ8 CE age and/or data integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged periods of time. Am29LV640MH DQ6 DQ13 DQ4 DQ11 DQ3 ...
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... CE# (A-1) OE# WE# WP#/ACC RESET# V RY/BY# IO BYTE# Am29LV640MH/L = Hardware Reset Pin input = Ready/Busy output = Selects 8-bit or 16-bit mode = 3.0 volt-only single power supply (see Product Selector Guide for speed options and voltage supply tolerances) = Output Buffer power = Device Ground = Pin Not Connected Internally ...
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... Notes: 1. For the Am29LV640MH-L device, the last numeric digit in the speed option (e.g. 101, 112, 120) is used for internal purposes only select product with ESN factory-locked into the SecSi Sector: 1) select order number from the valid combinations given above, 2) add designator “ ...
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... Group Protection and Unprotection”. All sectors are unprotected when shipped from the factory (The SecSi Sector may be factory protected depending on version ordered OUT polling, or sector protect algorithm (see Figure 2). Am29LV640MH/L lists the device bus operations, the in- DQ8–DQ15 DQ0– BYTE# BYTE# DQ7 = ...
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... The system would use a two-cycle program command sequence as required by the Unlock Bypass mode. Removing V from the WP#/ACC pin returns the device to nor- HH mal operation. Note that the WP#/ACC pin must not be Am29LV640MH/L . When CE# is PACC Fast page mode ac- ACC CE , and OE ...
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... Flash memory. Refer to the rameters and to Figure 16 for the timing diagram. Output Disable Mode When the OE# input disabled. The output pins are placed in the high impedance state. Am29LV640MH/L DC Characteristics table for the automatic ±0.3 V, the device RESET# is held CC4 ± ...
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... Am29LV640MH/L 8-bit 16-bit Address Range Address Range (in hexadecimal) (in hexadecimal) 000000–00FFFF 000000–007FFF 010000–01FFFF 008000–00FFFF 020000–02FFFF 010000–017FFF 030000–03FFFF 018000–01FFFF 040000–04FFFF 020000–027FFF 050000–05FFFF 028000–02FFFF 060000–06FFFF 030000– ...
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... Am29LV640MH/L 8-bit 16-bit Address Range Address Range (in hexadecimal) (in hexadecimal) 380000–38FFFF 1C0000–1C7FFF 390000–39FFFF 1C8000–1CFFFF 3A0000–3AFFFF 1D0000–1D7FFF 3B0000–3BFFFF 1D8000–1DFFFF 3C0000–3CFFFF 1E0000–1E7FFF 3D0000–3DFFFF 1E8000–1EFFFF 3E0000–3EFFFF 1F0000– ...
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... A21:A0 in word mode (BYTE Am29LV640MH/L 8-bit 16-bit Address Range Address Range (in hexadecimal) (in hexadecimal) 700000–70FFFF 380000–387FFF 710000–71FFFF 388000–38FFFF 720000–72FFFF 390000–397FFF 730000–73FFFF 398000–39FFFF 740000–74FFFF 3A0000–3A7FFF 750000–75FFFF 3A8000– ...
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... AMD’s ExpressFlash™ Service. Con- tact an AMD representative for details possible to determine whether a sector group is protected or unprotected. See the on the RE- ID section for details. SA0 SA1 SA2 SA3 Am29LV640MH/L Table 2). Table 3 shows the remain- 10 and 11. This . Refer to the Autoselect ID section for more information. ...
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... SA127 December 14, 2005 A21–A15 00100xx 00101xx 00110xx 00111xx 01000xx 01001xx 01010xx 01011xx 01100xx 01101xx 01110xx 01111xx 10000xx 10001xx 10010xx 10011xx 10100xx 10101xx 10110xx 10111xx 11000xx 11001xx 11010xx 11011xx 11100xx 11101xx 11110xx 1111100 1111101 1111110 1111111 Am29LV640MH/L 17 ...
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... Figure 23 shows the timing diagrams, for this feature. START RESET (Note 1) Perform Erase or Program Operations RESET Temporary Sector Group Unprotect Completed (Note 2) , the first or last sector will remain protected). IL Am29LV640MH 4 During this mode, for- ID December 14, 2005 ...
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... Reset PLSCNT = 1 Increment PLSCNT No Yes PLSCNT = 1000? Yes Device failed Sector Group Unprotect Algorithm Figure 2. In-System Sector Group Protect/Unprotect Algorithms Am29LV640MH/L START PLSCNT = 1 RESET Wait 1 μs Temporary Sector No First Write Group Unprotect Cycle = 60h? Mode Yes All sector No groups ...
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... Sector, follow the algorithm shown in Figure 3. Once the SecSi Sector is programmed, locked and verified, the system must write the Exit SecSi Sector Region command sequence to return to reading and writing within the remainder of the array. Am29LV640MH/L Customer Lockable Determined by customer for SecSi Sector addressing. Command Definitions ...
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... The device enters the CFI query mode, and the system can read CFI data at the addresses given in Tables 6–9. The system must write the reset command to return the device to reading array data. Am29LV640MH LKO or WE ...
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... Typical timeout per individual block erase 2 Typical timeout for full chip erase 2 Max. timeout for byte/word write 2 N Max. timeout for buffer write 2 times typical Max. timeout per individual block erase 2 Max. timeout for full chip erase 2 Am29LV640MH/L Description Description pin present) N µs N µ ...
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... Number of Erase Block Regions within device (01h = uniform device, 02h = boot device) Erase Block Region 1 Information (refer to the CFI specification or CFI publication 100) Erase Block Region 2 Information (refer to CFI publication 100) Erase Block Region 3 Information (refer to CFI publication 100) Erase Block Region 4 Information (refer to CFI publication 100) Am29LV640MH ...
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... DQ5 goes high during an active program or erase op- eration the device is in the autoselect mode. See the next section, tion. See also Requirements for Reading Array Data Device Bus Operations Am29LV640MH/L Erase Suspend/Erase Resume Reset Command, for more informa- in the section for more information. December 14, 2005 ...
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... The system is not required to provide further controls or timings. The device automatically provides internally generated program pulses and verifies the programmed cell margin. Tables address and data requirements for the word/byte pro- gram command sequence, respectively. Am29LV640MH/L A6:A-1 (x8) 00h 02h 1Ch 1Eh ...
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... The write-buffer programming operation can be sus- pended using the standard program suspend/resume commands. Upon successful completion of the Write Buffer Programming operation, the device is ready to execute the next command. The Write Buffer Programming Sequence can be aborted in the following ways: Am29LV640MH/L –A . All subsequent ad- MAX ...
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... In addition, no external pullup is nec- essary since the WP#/ACC pin has internal pullup Figure 5 illustrates the algorithm for the program oper- ation. Refer to the table in the AC Characteristics section for parameters, and Figure 17 for timing diagrams. Am29LV640MH/L for operations HH Erase and Program Operations 27 ...
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... Yes No 4. Yes Yes No PASS Am29LV640MH/L When Sector Address is specified, any address in the selected sector is acceptable. However, when loading Write-Buffer address locations with data, all addresses must fall within the selected Write-Buffer Page. Therefore, DQ7 should be verified. DQ5= “1”, then the device FAILED. If this flowchart location was reached because DQ1= “ ...
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... Program Suspend mode and continue the programming opera- tion. Further writes of the Resume command are ig- nored. Another Program Suspend command can be written after the device has resume programming. Am29LV640MH/L No Write Operation Status for more 29 ...
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... The device does not require the system to preprogram prior to erase. The Embedded Erase algorithm auto- matically programs and verifies the entire memory for Am29LV640MH/L Erase and Program Operations ta- 10 and 11 ...
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... Figure 19 section for timing diagrams. START Write Erase Command Sequence (Notes 1, 2) Data Poll to Erasing Bank from System Embedded Erase algorithm in progress No Data = FFh? Yes Erasure Completed 11 for erase command sequence. Figure 7. Erase Operation Am29LV640MH/L Write Opera- Erase and Program Operations ta- 31 ...
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... Note that the additional suspends do not affect device reliability or future performance. In most systems rapid erase/suspend activity occurs only briefly. In such section for infor- cases, erase performance will not be significantly im- pacted. Am29LV640MH/L Write Operation Status section for more and Autoselect Command Sequence December 14, 2005 ...
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... System may read and program in non-erasing sectors, or enter autoselect mode, when in Erase Suspend mode. Erase Suspend command is valid only during a sector erase operation. 16. Erase Resume command is valid only during Erase Suspend mode. Am29LV640MH Fourth Fifth Sixth ...
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... System may read and program in non-erasing sectors, or enter autoselect mode, when in Erase Suspend mode. Erase Suspend command is valid only during a sector erase operation. 17. Erase Resume command is valid only during Erase Suspend mode. Am29LV640MH Fourth Fifth Sixth ...
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... DQ0–DQ6 may be still invalid. Valid data on DQ0–DQ7 will appear on suc- cessive read cycles. Table 12 shows the outputs for Data# Polling on DQ7. Figure 8 shows the Data# Polling algorithm. Figure 20 in the AC Characteristics Polling timing diagram. Am29LV640MH/L section shows the Data# 35 ...
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... DQ7 should be rechecked even if DQ5 = “1” because DQ7 may change simulta- neously with DQ5 START Read DQ7–DQ0 Addr = VA Yes DQ7 = Data DQ5 = 1? Yes Read DQ7–DQ0 Addr = VA Yes DQ7 = Data? No PASS FAIL Figure 8. Data# Polling Algorithm Am29LV640MH/L December 14, 2005 ...
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... Figure 9 shows the toggle bit algorithm. Figure 21 in the “AC Characteristics” section shows the toggle bit timing diagrams. Figure 22 shows the differences be- tween DQ2 and DQ6 in graphical form. See also the subsection on DQ2: Toggle Bit Am29LV640MH/L DQ7: Data# Poll- II. 37 ...
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... DQ2 and DQ6. Figure 9 shows the toggle bit algorithm in flowchart form, and the section “DQ2: Toggle Bit II” explains the algorithm. See also the section. Figure 21 shows the toggle bit timing diagram. Am29LV640MH/L Table 12 to compare out- RY/BY#: Ready/Busy# sub- ...
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... Under these conditions DQ1 produces a “ 1 ” Write-to-Buffer-Abort-Reset command sequence to re- turn the device to reading array data. See Programming section for more details. Am29LV640MH/L Sector Erase Command Write Buffer 39 ...
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... Table 10. Write Operation Status DQ7 DQ5 (Note 2) DQ6 (Note 1) DQ7# Toggle 0 0 Toggle 0 Invalid (not allowed) Data 1 No toggle 0 Data DQ7# Toggle 0 DQ7# Toggle 0 DQ7# Toggle 0 Am29LV640MH/L DQ2 DQ3 (Note 2) DQ1 RY/BY# N/A No toggle Toggle N N/A Toggle N N/A N/A N/A 0 N/A N/A 0 ...
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... V for periods ns. Maximum SS +0.5 V. See Figure 10. During voltage CC +2.0 V for periods ns +2 +0.5 V 2.0 V Figure 11. Maximum Positive ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C A section for valid V /V range combinations. The I/ 1 Am29LV640MH/L +0 –2.0 V for Overshoot Waveform 41 ...
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... < maximum minimum V CC for these connections voltage requirements max voltage requirements Includes RY/BY# 10. Not 100% tested. Am29LV640MH/L Min Typ Max Unit ±1.0 µA 35 µA 35 µA ±1.0 µ ...
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... Note < INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Measurement Level . IO Figure 13. Input Waveforms and Measurement Levels Am29LV640MH/L All Speeds 1 TTL gate 0.0–3.0 1.5 0 the reference level is 0 ...
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... Min Min Min = V . Contact AMD for Addresses Stable t ACC OEH t CE HIGH Z Figure 14. Read Operation Timings Am29LV640MH/L Speed Options 101, 112R 112 120R 120 101R 100 110 120 100 110 120 100 110 120 ...
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... AC CHARACTERISTICS A21-A2 A1-A0 Data Bus CE# OE# * Figure shows device in word mode. Addresses are A1–A-1 for byte mode. December 14, 2005 Same Page PACC PACC t ACC Qa Qb Figure 15. Page Read Timings Am29LV640MH PACC ...
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... Description Max Max Min Min Min Min = V . Contact AMD for information on AC operation with Reset Timings during Embedded Algorithms t Ready t RP Figure 16. Reset Timings Am29LV640MH/L All Speed Options Unit μs 20 500 ns 500 µ ≠ ...
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... AC operation with V 7. When using the program suspend/resume feature, if the suspend command is issued within t re-applied upon resuming the programming operation. If the suspend command is issued after t again prior to reading the status bits upon resuming. Am29LV640MH/L Speed Options 101, 112, 120, 101R 112R ...
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... POLL WPH A0h t BUSY is the true data at the program address. OUT Figure 17. Program Operation Timings Am29LV640MH/L Read Status Data (last two cycles WHWH1 Status D OUT VHH December 14, 2005 ...
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... Illustration shows device in word mode. Figure 19. Chip/Sector Erase Operation Timings December 14, 2005 555h for chip erase WPH t DH 55h 30h 10 for Chip Erase t BUSY Am29LV640MH/L Read Status Data WHWH2 In Complete Progress ...
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... Note Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data read cycle ACC Complement Complement Status Data Status Data Figure 20. Data# Polling Timings (During Embedded Algorithms) Am29LV640MH/L VA High Z Valid Data True High Z True Valid Data December 14, 2005 ...
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... AHT AS t AHT t ASO t CEPH t OEPH t OE Valid Valid Status Status (first read) (second read) Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure 22. DQ2 vs. DQ6 Am29LV640MH/L Valid Valid Data Status (stops toggling) Erase Resume Erase Erase Complete Read 51 ...
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... VIDR CE# WE# RY/BY# Figure 23. Temporary Sector Group Unprotect Timing Diagram Min Min = V . Contact AMD for information on AC operation with Program or Erase Command Sequence t RSP Am29LV640MH/L All Speed Options Unit 500 ns 4 µs ≠ ...
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... Note: For sector group protect, A6:A0 = 0xx0010. For sector group unprotect, A6:A0 = 1xx0010.N Figure 24. Sector Group Protect and Unprotect Timing Diagram December 14, 2005 Valid* Valid* Verify 60h 40h Sector Group Protect: 150 µs, Sector Group Unprotect Am29LV640MH/L Valid* Status 53 ...
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... AMD for information on AC operation with V 7. When using the program suspend/resume feature, if the suspend command is issued within t re-applied upon resuming the programming operation. If the suspend command is issued after t required again prior to reading the status bits upon resuming. Am29LV640MH/L Speed Options 101, 112, 120, 90R 101R ...
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... WHWH1 CPH t BUSY for program PD for program 55 for erase 30 for sector erase 10 for chip erase 3. DQ7# is the complement of the data written to the device the data written to the device. OUT Operation Timings Am29LV640MH/L PA DQ7#, D OUT DQ15 55 ...
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... The device has a minimum erase and program cycle endurance of 100,000 cycles. –100 mA = 3.0 V, one pin at a time. CC Test Setup OUT Test Conditions Am29LV640MH/L Unit Comments 15 sec Excludes 00h programming prior to sec erasure (Note 6) µs µs µs µs µs Excludes system level 57 µ ...
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... PROTRUSION AND AN ADJACENT LEAD TO BE 0.07 mm. 7 THESE DIMESIONS APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.10 mm AND 0.25 mm FROM THE LEAD TIP. 8. LEAD COPLANARITY SHALL BE WITHIN 0. MEASURED FROM THE SEATING PLANE. 9 DIMENSION "e" IS MEASURED AT THE CENTERLINE OF THE LEADS. Am29LV640MH/L 3160\38.10A 57 ...
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... PHYSICAL DIMENSIONS LAA064—64-Ball Fortified Ball Grid Array ( BGA Package Am29LV640MH/L December 14, 2005 ...
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... Removed typos in notes. Hardware Reset, CMOS Tables, Erase and Program Operations, Temporary Sector Unprotect, and Alternate CE# Controlled Erase and Program Operations Added Note. Revision E+1 (February 16, 2003) Distinctive Characteristics Corrected performance characteristics. Am29LV640MH/L and t standard for the PACC OE μ s. and V mini- ...
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... For new and current designs, S29GL064A supersedes Am29LV640M H/L and is the factory-rec- ommended migration path. Please refer to the S29GL064A datasheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. Am29LV640MH/L specification. OL information. POLL December 14, 2005 ...