TC74LVX32FN(ELP,M) Toshiba, TC74LVX32FN(ELP,M) Datasheet

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TC74LVX32FN(ELP,M)

Manufacturer Part Number
TC74LVX32FN(ELP,M)
Description
IC GATE OR QUAD 2INP 14-SOL
Manufacturer
Toshiba
Series
74LVXr
Datasheet

Specifications of TC74LVX32FN(ELP,M)

Logic Type
OR Gate
Number Of Inputs
2
Number Of Circuits
4
Current - Output High, Low
4mA, 4mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
TC74LVX32FN(ELP)
TC74LVX32FN-ELP
TC74LVX32FNELP
TC74LVX32FNELPM
Quad 2-Input OR Gate
gate fabricated with silicon gate CMOS technology. Designed for
use in 3-V systems, it achieves high-speed operation while
maintaining the CMOS low power dissipation.
systems.
output, which provide high noise immunity and stable output.
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5V to 3V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
Features
The TC74LVX32F/ FN/ FT is a high-speed CMOS 2-input OR
This device is suitable for low-voltage and battery operated
The internal circuit is composed of 4 stages including buffer
An input protection circuit ensures that 0 to 5.5V can be
High-speed: t
Low power dissipation: I
Input voltage level: V
Power-down protection provided on all inputs
Balanced propagation delays: t
Low noise: V
Pin and function compatible with 74HC32
TC74LVX32F,TC74LVX32FN,TC74LVX32FT
OLP
pd
= 4.4 ns (typ.) (V
= 0.5 V (max)
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
V
IL
IH
= 0.8 V (max) (V
CC
= 2.0 V (min) (V
= 2 μA (max) (Ta = 25°C)
pLH
CC
∼ − t
= 3.3 V)
pHL
CC
CC
= 3 V)
= 3 V)
1
Note:
Weight
SOP14-P-300-1.27A
SOL14-P-150-1.27
TSSOP14-P-0044-0.65A
TC74LVX32F
TC74LVX32FN
TC74LVX32FT
xxxFN (JEDEC SOP) is not available in
Japan.
TC74LVX32F/FN/FT
: 0.18 g (typ.)
: 0.12 g (typ.)
: 0.06 g (typ.)
2007-10-17

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TC74LVX32FN(ELP,M) Summary of contents

Page 1

... TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74LVX32F,TC74LVX32FN,TC74LVX32FT Quad 2-Input OR Gate The TC74LVX32F/ FN high-speed CMOS 2-input OR gate fabricated with silicon gate CMOS technology. Designed for use in 3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. This device is suitable for low-voltage and battery operated systems ...

Page 2

... Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc) ...

Page 3

Operating Ranges (Note) Characteristics Supply voltage Input voltage Output voltage Operating temperature Input rise and fall time Note: The operating ranges must be maintained to ensure the normal operation of the device. Unused inputs must be tied to either VCC ...

Page 4

AC Characteristics (input: t Characteristics Symbol t pLH Propagation delay time t pHL t osLH Output to output skew t osHL Input capacitance C Power dissipation capacitance C Note 1: Parameter guaranteed by design − osLH ...

Page 5

Package Dimensions Weight: 0.18 g (typ.) TC74LVX32F/FN/FT 5 2007-10-17 ...

Page 6

Package Dimensions (Note) Note: This package is not available in Japan. Weight: 0.12 g (typ.) TC74LVX32F/FN/FT 6 2007-10-17 ...

Page 7

Package Dimensions Weight: 0.06 g (typ.) TC74LVX32F/FN/FT 7 2007-10-17 ...

Page 8

... Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable laws or regulations. • The information contained herein is presented only as guidance for Product use. No responsibility is assumed by TOSHIBA for any infringement of patents or any other intellectual property rights of third parties that may result from the use of Product. No license to any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise. • ...

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