74LVC373AD,112 NXP Semiconductors, 74LVC373AD,112 Datasheet - Page 15

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74LVC373AD,112

Manufacturer Part Number
74LVC373AD,112
Description
IC DTYPE LATCH OCTAL 20SOIC
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet

Specifications of 74LVC373AD,112

Logic Type
D-Type Transparent Latch
Package / Case
20-SOIC (7.5mm Width)
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
2.7 V ~ 3.6 V
Independent Circuits
1
Delay Time - Propagation
1.5ns
Current - Output High, Low
24mA, 24mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Number Of Circuits
8
Logic Family
LVC
Polarity
Non-Inverting
Input Bias Current (max)
0.1 uA
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Propagation Delay Time
3 ns at 3.3 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4619-5
74LVC373AD
74LVC373AD
935218630112
Philips Semiconductors
2003 May 19
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm
Octal D-type transparent latch with
5 V tolerant inputs/outputs; 3-state
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
OUTLINE
VERSION
SOT360-1
max.
1.1
A
0.15
0.05
A
20
1
1
Z
y
0.95
0.80
A
2
pin 1 index
IEC
0.25
A
3
e
D
0.30
0.19
b
p
MO-153
JEDEC
0.2
0.1
c
b
p
REFERENCES
D
6.6
6.4
0
(1)
11
10
w
E
4.5
4.3
M
(2)
JEITA
scale
0.65
2.5
15
e
c
A
H
6.6
6.2
2
E
A
1
5 mm
L
1
0.75
0.50
L
H
p
E
E
detail X
0.4
0.3
Q
L
L
PROJECTION
EUROPEAN
p
0.2
v
Q
A
(A )
0.13
3
w
Product specification
X
74LVC373A
v
0.1
A
y
M
ISSUE DATE
A
99-12-27
03-02-19
Z
0.5
0.2
(1)
SOT360-1
8
0
o
o

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