74LVQ373SJ Fairchild Semiconductor, 74LVQ373SJ Datasheet - Page 2
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74LVQ373SJ
Manufacturer Part Number
74LVQ373SJ
Description
IC LATCH TRANSP OCT 3ST 20-SOP
Manufacturer
Fairchild Semiconductor
Series
74LVQr
Datasheet
1.74LVQ373SJX.pdf
(7 pages)
Specifications of 74LVQ373SJ
Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
2 V ~ 6 V
Independent Circuits
1
Delay Time - Propagation
8ns
Current - Output High, Low
12mA, 12mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
www.fairchildsemi.com
Functional Description
The LVQ373 contains eight D-type latches with 3-STATE
standard outputs. When the Latch Enable (LE) input is
HIGH, data on the D
dition the latches are transparent, i.e., a latch output will
change state each time its D-type input changes. When LE
is LOW, the latches store the information that was present
on the D-type inputs a setup time preceding the
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
n
inputs enters the latches. In this con-
2
HIGH-to-LOW transition of LE. The 3-STATE standard out-
puts are controlled by the Output Enable (OE) input. When
OE is LOW, the standard outputs are in the 2-state mode.
When OE is HIGH, the standard outputs are in the high
impedance mode but this does not interfere with entering
new data into the latches.