74AHCT373PW,112 NXP Semiconductors, 74AHCT373PW,112 Datasheet - Page 5

• Manufacturer Part Number: 74AHCT373PW,112
• Description: IC OCT D TRANSP LTCH 3ST 20TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74AHCTr
• Type: D-Typer

Specifications of 74AHCT373PW,112

• Logic Type: D-Type Transparent Latch
• Circuit: 8:8
• Output Type: Tri-State
• Voltage - Supply: 4.5 V ~ 5.5 V
• Independent Circuits: 1
• Delay Time - Propagation: 4ns
• Current - Output High, Low: 8mA, 8mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 20-TSSOP
• Logic Family: AHCT
• Number Of Bits: 8
• Number Of Elements: 1
• Latch Mode: Transparent
• Polarity: Non-Inverting
• Technology: CMOS
• Package Type: TSSOP
• Propagation Delay Time: 17ns
• Operating Supply Voltage (typ): 5V
• High Level Output Current: -8mA
• Low Level Output Current: 8mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 20
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74AHCT373PW; 74AHCT373PW; 935262650112

NXP Semiconductors
Table 2.
6. Functional description
Table 3.
[1]
7. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
[1]
[2]
74AHC_AHCT373_3
Product data sheet
Symbol
D7
Q7
V
Operating mode
Enable and read register (transparent mode)
Latch and read register
Latch register and disable outputs
Symbol
V
V
I
I
I
I
I
T
P
IK
OK
O
CC
GND
stg
CC
CC
I
tot
H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition;
X = don’t care;
Z = high-impedance OFF-state.
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For SO20 packages: above 70 C the value of P
For TSSOP20 packages: above 60 C the value of P
Pin description
Function table
Limiting values
Parameter
supply voltage
input voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
Pin
18
19
20
[1]
…continued
Description
data input
3-state latch output
supply voltage
tot
Control
OE
L
L
H
Conditions
V
V
V
T
derates linearly at 8 mW/K.
amb
I
O
O
tot
Rev. 03 — 20 May 2008
< 0.5 V
< 0.5 V or V
= 0.5 V to (V
derates linearly at 5.5 mW/K.
= 40 C to +125 C
LE
H
L
X
O
CC
> V
74AHC373; 74AHCT373
+ 0.5 V)
CC
+ 0.5 V
Octal D-type transparant latch; 3-state
Input
Dn
L
H
l
h
X
X
Internal
latch
L
H
L
H
X
X
[1]
[1]
[2]
Min
-
-
0.5
0.5
20
20
25
75
65
© NXP B.V. 2008. All rights reserved.
Max
+7.0
+7.0
-
+20
+25
+75
-
+150
500
Output
Q0 to Q7
L
H
L
H
Z
Z
Unit
V
V
mA
mA
mA
mA
mA
mW
C
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