74LVT573PW,118 NXP Semiconductors, 74LVT573PW,118 Datasheet - Page 10

IC OCTAL D TRANSP LATCH 20TSSOP

74LVT573PW,118

Manufacturer Part Number
74LVT573PW,118
Description
IC OCTAL D TRANSP LATCH 20TSSOP
Manufacturer
NXP Semiconductors
Series
74LVTr
Type
D-Typer
Datasheet

Specifications of 74LVT573PW,118

Logic Type
D-Type Transparent Latch
Package / Case
20-TSSOP
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
2.7 V ~ 3.6 V
Independent Circuits
1
Delay Time - Propagation
6.3ns
Current - Output High, Low
32mA, 64mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Circuits
8
Logic Family
LVT
Polarity
Non-Inverting
Input Bias Current (max)
3000 uA
High Level Output Current
- 32 mA
Low Level Output Current
32 mA
Propagation Delay Time
2.7 ns at 3.3 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Bits
8
Number Of Elements
1
Latch Mode
Transparent
Technology
BiCMOS
Package Type
TSSOP
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74LVT573PW-T
74LVT573PW-T
935176360118
NXP Semiconductors
12. Package outline
Fig 12. Package outline SOT163-1 (SO20)
74LVT573_4
Product data sheet
SO20: plastic small outline package; 20 leads; body width 7.5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
inches
UNIT
mm
OUTLINE
VERSION
SOT163-1
max.
2.65
0.1
A
20
1
Z
y
0.012
0.004
A
0.3
0.1
1
pin 1 index
0.096
0.089
2.45
2.25
A
2
075E04
IEC
0.01
0.25
e
A
3
D
0.019
0.014
0.49
0.36
b
p
0.013
0.009
0.32
0.23
MS-013
JEDEC
c
0
Rev. 04 — 15 September 2008
b
REFERENCES
13.0
12.6
0.51
0.49
D
p
(1)
11
10
0.30
0.29
E
w
7.6
7.4
(1)
M
JEITA
scale
0.05
1.27
5
e
c
10.65
10.00
0.419
0.394
H
E
A
3.3 V octal D-type transparent latch; (3-state)
2
0.055
A
1.4
L
1
10 mm
0.043
0.016
1.1
0.4
L
p
H
E
E
detail X
0.043
0.039
1.1
1.0
Q
L
PROJECTION
L
EUROPEAN
p
0.25
0.01
Q
v
(A )
3
0.25
0.01
w
A
74LVT573
A
0.004
0.1
© NXP B.V. 2008. All rights reserved.
y
X
v
ISSUE DATE
M
99-12-27
03-02-19
0.035
0.016
Z
0.9
0.4
A
(1)
SOT163-1
8
0
o
o
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