74ALVC373BQ,115 NXP Semiconductors, 74ALVC373BQ,115 Datasheet - Page 10

• Manufacturer Part Number: 74ALVC373BQ,115
• Description: IC OCTAL D TRANSP LATCH 20DHVQFN
• Manufacturer: NXP Semiconductors
• Series: 74ALVCr

Specifications of 74ALVC373BQ,115

• Logic Type: D-Type Transparent Latch
• Package / Case: 20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
• Circuit: 8:8
• Output Type: Tri-State
• Voltage - Supply: 1.65 V ~ 3.6 V
• Independent Circuits: 1
• Delay Time - Propagation: 2.2ns
• Current - Output High, Low: 24mA, 24mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Number Of Circuits: 1
• Logic Family: ALVC
• Polarity: Non-Inverting
• Input Bias Current (max): 0.2 uA
• High Level Output Current: - 24 mA
• Low Level Output Current: 24 mA
• Propagation Delay Time: 2.3 ns at 2.7 V, 2.2 ns at 3 V to 3.6 V
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 1.65 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74ALVC373BQ-G; 74ALVC373BQ-G; 935285555115

NXP Semiconductors
74ALVC373_2
Product data sheet
Fig 10. Enable and disable times
Fig 11. The data set-up and hold times for Dn input to LE input
Measurement points are given in
V
Measurement points are given in
The shaded areas indicate when the input is permitted to change for predicable output performance.
OL
and V
OH
are the typical output voltage levels that occur with the output load.
HIGH-to-OFF
OFF-to-HIGH
LOW-to-OFF
OFF-to-LOW
Dn input
LE input
Q
Q
n
OE input
n
output
output
GND
GND
V
V
Table
Table
I
I
GND
GND
V
V
V
OH
CC
OL
V
I
8.
8.
V
Rev. 02 — 18 October 2007
M
V
enabled
t
outputs
M
su
t
PLZ
t PHZ
t
V
h
M
V
X
V
Y
disabled
outputs
t
Octal D-type transparent latch; 3-state
PZL
t
t
su
PZH
V
t
M
h
V
M
mna887
outputs
enabled
mna395
74ALVC373
© NXP B.V. 2007. All rights reserved.
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