74ALVC373BQ,115 NXP Semiconductors, 74ALVC373BQ,115 Datasheet - Page 8
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74ALVC373BQ,115
Manufacturer Part Number
74ALVC373BQ,115
Description
IC OCTAL D TRANSP LATCH 20DHVQFN
Manufacturer
NXP Semiconductors
Series
74ALVCr
Datasheet
1.74ALVC373BQ115.pdf
(17 pages)
Specifications of 74ALVC373BQ,115
Logic Type
D-Type Transparent Latch
Package / Case
20-VQFN Exposed Pad, 20-HVQFN, 20-SQFN, 20-DHVQFN
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
1.65 V ~ 3.6 V
Independent Circuits
1
Delay Time - Propagation
2.2ns
Current - Output High, Low
24mA, 24mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Circuits
1
Logic Family
ALVC
Polarity
Non-Inverting
Input Bias Current (max)
0.2 uA
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Propagation Delay Time
2.3 ns at 2.7 V, 2.2 ns at 3 V to 3.6 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74ALVC373BQ-G
74ALVC373BQ-G
935285555115
74ALVC373BQ-G
935285555115
NXP Semiconductors
Table 7.
Voltages are referenced to GND (ground = 0 V). For test circuit see
[1]
[2]
[3]
74ALVC373_2
Product data sheet
Symbol
t
t
t
C
W
su
h
PD
Typical values are measured at T
t
t
t
C
P
f
C
V
N = number of inputs switching
pd
en
dis
i
(C
D
CC
PD
= input frequency in MHz; f
L
is the same as t
is the same as t
= output load capacitance in pF
is the same as t
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in Volts
PD
V
Parameter
pulse width
set-up time
hold time
power dissipation
capacitance
Dynamic characteristics
CC
2
V
CC
f
o
2
) = sum of the outputs
PHL
PZH
f
PHZ
i
N + (C
and t
and t
and t
PLH
PZL
PLZ
o
= output frequency in MHz
L
.
.
.
amb
V
CC
= 25 C
2
…continued
Conditions
LE pulse width HIGH; see
Dn to LE; see
Dn to LE; see
per latch; V
V
V
V
V
V
V
V
V
V
V
V
V
outputs HIGH or LOW state
outputs 3-state
f
o
) where:
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 2.7 V
= 3.0 V to 3.6 V
Rev. 02 — 18 October 2007
I
= GND to V
Figure 11
Figure 11
D
in W).
CC
Figure 9
; V
Figure
CC
= 3.3 V
12.
Octal D-type transparent latch; 3-state
[3]
Min
3.8
3.3
3.3
3.3
0.8
0.8
0.8
0.8
0.8
0.8
0.8
0.7
-
-
40 C to +85 C
74ALVC373
Typ
1.0
0.8
2.0
2.2
0.1
0.1
0.1
0.1
35
14
0.1
0.2
0.3
0.1
[1]
© NXP B.V. 2007. All rights reserved.
Max
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
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