74LVCH16373ADL,118 NXP Semiconductors, 74LVCH16373ADL,118 Datasheet - Page 2

• Manufacturer Part Number: 74LVCH16373ADL,118
• Description: IC 16BIT BUS TXRX 48SSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVCHr

Specifications of 74LVCH16373ADL,118

• Logic Type: D-Type Transparent Latch
• Circuit: 8:8
• Output Type: Tri-State
• Voltage - Supply: 1.2 V ~ 3.6 V
• Independent Circuits: 2
• Delay Time - Propagation: 1.5ns
• Current - Output High, Low: 24mA, 24mA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74LVCH16373ADL-T; 74LVCH16373ADL-T; 935238480118

Philips Semiconductors
FEATURES
FUNCTION TABLE
Per section of eight bits; note 1
Note
1. H = HIGH voltage level;
2003 Dec 08
Enable and read register (transparent mode)
Latch and read register
Latch register and disable outputs
5 V tolerant inputs/outputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 to 3.6 V
CMOS low power consumption
MULTIBYTE flow-through standard pin-out architecture
Low inductance multiple power and ground pins for
minimum noise and ground bounce
Direct interface with TTL levels
All data inputs have bushold (74LVCH16373A only)
High-impedance when V
Complies with JEDEC standard no. 8-1A
ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Specified from 40 to +85 C and 40 to +125 C.
16-bit D-type transparent latch with 5 V
tolerant inputs/outputs; 3-state
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition;
Z = high-impedance OFF-state.
OPERATING MODES
CC
= 0 V.
nOE
H
H
L
L
L
L
2
DESCRIPTION
The 74LVC(H)16373A is a 16-bit D-type transparent latch
featuring separate D-type inputs for each latch and 3-state
outputs for bus oriented applications. One Latch Enable
(LE) input and one Output Enable (OE) are provided for
each octal. Inputs can be driven from either 3.3 or 5 V
devices. In 3-state operation, outputs can handle 5 V.
These features allow the use of these devices in a mixed
3.3 and 5 V environment.
The 74LVC(H)16373A consists of 2 sections of eight
D-type transparent latches with 3-state true outputs. When
LE is HIGH, data at the Dn inputs enter the latches. In this
condition the latches are transparent, i.e., a latch output
will change each time its corresponding D-input changes.
When LE is LOW the latches store the information that was
present at the D-inputs a set-up time preceding the
HIGH-to-LOW transition of LE. When OE is LOW, the
contents of the eight latches are available at the outputs.
When OE is HIGH, the outputs go to the high impedance
OFF-state. Operation of the OE input does not affect the
state of the latches.
The 74LVCH16373A bushold data inputs eliminates the
need for external pull up resistors to hold unused inputs.
INPUT
nLE
H
H
L
L
L
L
nDn
H
L
h
h
l
l
74LVCH16373A
INTERNAL
LATCHE
74LVC16373A;
Product specification
H
H
H
L
L
L
nQ0 to nQ7
OUTPUT
H
H
L
L
Z
Z