74ALVT16373DL,112 NXP Semiconductors, 74ALVT16373DL,112 Datasheet - Page 2

• Manufacturer Part Number: 74ALVT16373DL,112
• Description: IC 16BIT TRANSP D LATCH 48SSOP
• Manufacturer: NXP Semiconductors
• Series: 74ALVTr

Specifications of 74ALVT16373DL,112

• Logic Type: D-Type Transparent Latch
• Circuit: 8:8
• Output Type: Tri-State
• Voltage - Supply: 2.3 V ~ 2.7 V, 3 V ~ 3.6 V
• Independent Circuits: 1
• Delay Time - Propagation: 2ns
• Current - Output High, Low: 8mA, 24mA; 32mA, 64mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74ALVT16373DL; 74ALVT16373DL; 935209580112

FEATURES
QUICK REFERENCE DATA
ORDERING INFORMATION
Philips Semiconductors
48-Pin Plastic SSOP Type III
48-Pin Plastic TSSOP Type II
1999 Oct 18
16-bit transparent latch
5V I/O compatibile
3-State buffers
Output capability: +64mA/-32mA
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
Power-up reset
Power-up 3-State
No bus current loading when output is tied to 5V bus
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
2.5V/3.3V 16-bit transparent D-type latch (3-State)
SYMBOL
SYMBOL
C
I
t
t
C
PLH
PHL
CCZ
OUT
IN
PACKAGES
Propagation delay
nDx to nQx
Input capacitance
Output capacitance
Total supply current
PARAMETER
PARAMETER
TEMPERATURE RANGE
–40 C to +85 C
–40 C to +85 C
C
V
Outputs disabled; V
Outputs disabled
I
L
= 0V or V
OUTSIDE NORTH AMERICA
= 50pF
2
74ALVT16373 DGG
74ALVT16373 DL
DESCRIPTION
The 74ALVT16373 is a high-performance BiCMOS product
designed for V
to 5V.
This device is a 16-bit transparent D-type latch with non-inverting
3-State bus compatible outputs. The device can be used as two
8-bit latches or one 16-bit latch. When latch enable (LE) input is
High, the Q outputs follow the data (D) inputs. When latch enable is
taken Low, the Q outputs are latched at the levels of the D inputs
one setup time prior to the High-to-Low transition.
CC
CONDITIONS
T
amb
= 25 C
O
= 0V or 3.0V
CC
operation at 2.5V or 3.3V with I/O compatibility up
NORTH AMERICA
AV16373 DGG
AV16373 DL
2.5V
2.0
2.4
40
3
9
TYPICAL
74ALVT16373
Product specification
3.3V
1.6
1.8
70
3
9
DWG NUMBER
853-1842 22536
SOT370-1
SOT362-1
UNIT
UNIT
pF
pF
ns
A