74ABT573CMSAX Fairchild Semiconductor, 74ABT573CMSAX Datasheet - Page 7
![IC LATCH OCT D-TYPE 3ST 20SSOP](/photos/7/8/70854/261-20-ssop_sml.jpg)
74ABT573CMSAX
Manufacturer Part Number
74ABT573CMSAX
Description
IC LATCH OCT D-TYPE 3ST 20SSOP
Manufacturer
Fairchild Semiconductor
Series
74ABTr
Datasheet
1.74ABT573CSJX.pdf
(13 pages)
Specifications of 74ABT573CMSAX
Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
4.5 V ~ 5.5 V
Independent Circuits
1
Delay Time - Propagation
2.7ns
Current - Output High, Low
32mA, 64mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
©1993 Fairchild Semiconductor Corporation
74ABT573 Rev. 1.5.0
Skew
SOIC package.
Notes:
11. This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described
12. This specification is guaranteed but not tested. The limits represent propagation delays with 250pF load capacitors
13. Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate
14. This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same
15. Propagation delay variation for a given set of conditions (i.e., temperature and V
Capacitance
Note:
16. C
Symbol
t
t
OSHL
OSLH
t
t
OST
t
switching in phase (i.e., all LOW-to-HIGH, HIGH-to-LOW, etc.)
in place of the 50pF load capacitors in the standard AC load.
outputs of the same device. The specification applies to any outputs switching HIGH-to-LOW (t
(t
but not tested.
pin. It is measured across all the outputs (drivers) on the same chip, the worst (largest delta) number is the
guaranteed specification. This specification is guaranteed but not tested.
specification is guaranteed but not tested.
Symbol
C
PS
PV
OSLH
OUT
OUT
(14)
(15)
C
(13)
(11)
(13)
(13)
IN
(16)
is measured at frequency f
), or any combination switching LOW-to-HIGH and/or HIGH-to-LOW (t
Pin to Pin Skew, HL Transitions
Pin to Pin Skew, LH Transitions
Duty Cycle, LH–HL Skew
Pin to Pin Skew, LH/HL Transitions
Device to Device Skew LH/HL
Transitions
Input Capacitance
Output Capacitance
Parameter
Parameter
1MHz per MIL-STD-883B, Method 3012.
T
V
V
V
A
CC
CC
CC
Switching
7
–40°C to +85°C,
C
8 Outputs
0V
5.0V
L
4.5V to 5.5V,
Max.
1.0
1.0
1.4
1.5
2.0
Conditions
(T
50pF,
A
(11)
25°C)
OST
T
V
A
). This specification is guaranteed
CC
CC
) from device to device. This
Switching
C
–40°C to +85°C,
8 Outputs
L
4.5V to 5.5V,
Max.
1.5
1.5
3.5
3.9
4.0
Typ.
250pF,
5
9
OSHL
(12)
), LOW-to-HIGH
www.fairchildsemi.com
Units
pF
pF
Units
ns
ns
ns
ns
ns