AM29LV642DU12R AMD [Advanced Micro Devices], AM29LV642DU12R Datasheet
AM29LV642DU12R
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AM29LV642DU12R Summary of contents
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Am29LV642D Data Sheet July 2003 The following document specifies Spansion memory products that are now offered by both Advanced Micro Devices and Fujitsu. Although the document is marked with the name of the company that orig- inally developed the specification, ...
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PRELIMINARY Am29LV642D 128 Megabit ( 16-Bit) CMOS 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control DISTINCTIVE CHARACTERISTICS Two 64 Megabit (Am29LV640D single 64-ball Fortified BGA package (Note: Features will be described ...
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GENERAL DESCRIPTION The Am29LV642D is a 128 Mbit, 3.0 Volt (3 3.6 V) single power supply flash memory device organized as two Am29LV640D dice in a single 64-ball Fortified BGA package. Each Am29LV640D Mbit, 3.0 ...
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TABLE OF CONTENTS Distinctive Characteristics . . . . . . . . . . . . . . . . . . 1 General Description . . . . . . . . . . . . . . ...
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PRODUCT SELECTOR GUIDE Part Number Speed Option Regulated Voltage Range: V Max Access Time (ns) CE# Access Time (ns) OE# Access Time (ns) Note: See “AC Characteristics” for full specifications ...
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BLOCK DIAGRAM RY/BY# RESET# WE# State ACC Control Command Register CE# OE# V Detector CC A0–A21 RY/BY# State Control Command Register CE#2 V Detector CC A0–A21 ...
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CONNECTION DIAGRAM A8 B8 RFU RFU A7 B7 A13 A12 WE# RESET RY/BY# ACC A17 RFU RFU Special Handling Instructions for Fortified BGA ...
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PIN DESCRIPTION A0–A21 = 22 Addresses inputs DQ0–DQ15 = 16 Data inputs/outputs CE# = Chip Enable input CE2# = Chip Enable input for second die OE# = Output Enable input WE# = Write Enable input ACC = Acceleration Input RESET# ...
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... Megabit ( 16-Bit) CMOS Uniform Sector Flash Memory with VersatileIO 3.0 Volt-only Read, Program, and Erase Valid Combinations for Fortified BGA Packages Package Order Number Marking Am29LV642DU90R PAI L642DU90R I PAI, Am29LV642DU12R L642DU12R PAE TEMPERATURE RANGE I = Industrial (– + Extended (– ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is a latch ...
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See “VersatileI Control” for more information. IO Refer to the AC Read-Only Operations table for timing specifications and to Figure 13 for the timing diagram ...
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Flash memory. If RESET# is asserted during a program or erase op- eration, the RY/BY# pin remains a “0” (busy) until the internal reset operation is complete, which ...
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Table 2. Sector Address Table for CE# (Continued) Sector A21 A20 SA26 0 0 SA27 0 0 SA28 0 0 SA29 0 0 SA30 0 0 SA31 0 0 SA32 0 1 SA33 0 1 SA34 0 1 SA35 0 ...
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Table 2. Sector Address Table for CE# (Continued) Sector A21 A20 A19 SA61 SA62 SA63 SA64 SA65 SA66 SA67 ...
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Table 2. Sector Address Table for CE# (Continued) Sector A21 A20 SA96 1 1 SA97 1 1 SA98 1 1 SA99 1 1 SA100 1 1 SA101 1 1 SA102 1 1 SA103 1 1 SA104 1 1 SA105 1 ...
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Table 3. Sector Address Table for CE2# Sector A21 A20 A19 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 ...
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Table 3. Sector Address Table for CE2# (Continued) Sector A21 A20 SA34 0 1 SA35 0 1 SA36 0 1 SA37 0 1 SA38 0 1 SA39 0 1 SA40 0 1 SA41 0 1 SA42 0 1 SA43 0 ...
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Table 3. Sector Address Table for CE2# (Continued) Sector A21 A20 A19 SA69 SA70 SA71 SA72 SA73 SA74 SA75 ...
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Table 3. Sector Address Table for CE2# (Continued) Sector A21 A20 SA104 1 1 SA105 1 1 SA106 1 1 SA107 1 1 SA108 1 1 SA109 1 1 SA110 1 1 SA111 1 1 SA112 1 1 SA113 1 ...
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Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equip- ment to automatically match a device to be pro- grammed with ...
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Sector Group Protection and Unprotection The hardware sector group protection feature disables both program and erase operations in any sector group. In this device, a sector group consists of four adjacent sectors that are protected or unprotected at the same ...
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Temporary Sector Group Unprotect (Note: In this device, a sector group consists of four adjacent sectors that are protected or unprotected at the same time (see Table 5)). This feature allows temporary unprotection of previ- ously protected sector groups to ...
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START PLSCNT = 1 RESET Wait 1 s Temporary Sector No First Write Group Unprotect Cycle = 60h? Mode Yes Set up sector group address Sector Group Protect: Write 60h to sector group address with A6 = ...
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Hardware Data Protection The command sequence requirement of unlock cycles for programming or erasing provides data protection against inadvertent writes (refer to Table 10 for com- mand definitions). In addition, the following hardware data protection measures prevent accidental erasure or ...
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Addresses (x16) Data 1Bh 0030h 1Ch 0036h 1Dh 0000h 1Eh 0000h 1Fh 0004h 20h 0000h 21h 000Ah 22h 0000h 23h 0005h 24h 0000h 25h 0004h 26h 0000h Addresses (x16) Data 27h 0017h 28h 0000h 29h 0000h 2Ah 0000h 2Bh 0000h ...
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Table 9. Primary Vendor-Specific Extended Query Addresses (x16) Data 40h 0050h 41h 0052h 42h 0049h 43h 0031h 44h 0031h 45h 0001h 46h 0002h 47h 0004h 48h 0001h 49h 0004h 4Ah 0000h 4Bh 0000h 4Ch 0000h 4Dh 00B5h 4Eh 00C5h 4Fh ...
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See also “VersatileI Control” in the Device IO Bus Operations section for more information. The Read-Only Operations table provides the read param- eters, and Figure 13 shows the timing diagram. Reset Command Writing the reset command resets the ...
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The first cycle in this sequence contains the unlock bypass pro- gram command, A0h; the second cycle contains the program address and data. Additional data is pro- grammed in the ...
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When the Embedded Erase algorithm is complete, the device returns to the read mode and addresses are no longer latched. The system can determine the status of the erase operation by using DQ7, DQ6, DQ2, or RY/BY#. Refer to the ...
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In the erase-suspend-read mode, the system can also issue the autoselect command sequence. Refer to the Autoselect Mode and Autoselect Command Sequence sections for details. To resume the sector erase operation, the system must write the Erase Resume command. The ...
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Command Definitions Table 10. Am29LV642D Command Definitions Command Sequence (Note 1) Addr Read (Note Reset (Note 7) 1 XXX Manufacturer ID 4 555 Device ID 4 555 Sector Group Protect Verify 4 555 (Note 9) Enter SecSi ...
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WRITE OPERATION STATUS The device provides several bits to determine the status of a program or erase operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 11 and the following subsections describe the function of these bits. DQ7 and DQ6 each ...
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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin which indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...
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DQ2: Toggle Bit II The “Toggle Bit II” on DQ2, when used with DQ6, indi- cates whether a particular sector is actively erasing (that is, the Embedded Erase algorithm is in progress), or whether that sector is erase-suspended. Toggle Bit ...
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Status Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Erase Suspended Sector Erase-Suspend- Erase Read Suspend Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the maximum timing ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . – +150 C Ambient Temperature with Power Applied . . . . . . . . ...
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DC CHARACTERISTICS (For Two Am29LV640 Devices) CMOS Compatible Parameter Symbol Parameter Description I Input Load Current LI I A9, ACC Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Notes ...
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DC CHARACTERISTICS Zero-Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 ...
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TEST CONDITIONS Device Under Test C 6 Note: Diodes are IN3064 or equivalent Figure 11. Test Setup 3.0 V 1.5 V Input 0.0 V Note < the input measurement reference level is 0.5 V ...
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AC CHARACTERISTICS Read-Only Operations Parameter JEDEC Std. Description t t Read Cycle Time (Note 2) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...
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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std RESET# Pin Low (During Embedded Algorithms) t Ready to Read Mode (See Note) RESET# Pin Low (NOT During Embedded t Ready Algorithms) to Read Mode (See Note) t RESET# Pulse Width RP ...
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AC CHARACTERISTICS Erase and Program Operations Parameter JEDEC Std. Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL AS t Address Setup Time to OE# low during toggle bit polling ASO t t ...
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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555 h CE# or CE2# OE# WE Data RY/BY VCS ote program address program data ...
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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE# or CE2 Data 55h RY/BY# t VCS V CC Note sector address (for Sector Erase ...
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AC CHARACTERISTICS t RC Addresses VA t ACC t CE CE# or CE2 OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last ...
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AC CHARACTERISTICS Addresses CE# or CE2# t OEH WE# OE Valid Data DQ6/DQ2 RY/BY# Note Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read cycle, and array ...
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AC CHARACTERISTICS Temporary Sector Unprotect Parameter JEDEC Std Description t V Rise and Fall Time (See Note) VIDR ID RESET# Setup Time for Temporary Sector t RSP Unprotect RESET# Hold Time from RY/BY# High for t RRB Temporary Sector Group ...
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AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Group Protect/Unprotect Data 60h 1 µs CE# or CE2# WE# OE# For sector group protect For sector group unprotect, ...
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AC CHARACTERISTICS Alternate CE# Controlled Erase and Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time ELAX Data Setup ...
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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE# or CE2 Data t RH RESET# RY/BY# Notes: 1. Figure indicates last two bus cycles of a program or erase operation. 2. ...
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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Word Program Time Accelerated Word Program Time Chip Program Time (Note 3) Notes: 1. Typical program and erase times assume the following conditions 3 programming ...
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PHYSICAL DIMENSIONS LSA064—64-Ball Fortified Ball Grid Array (Fortified BGA package Am29LV642D 51 ...
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REVISION SUMMARY Revision A (August 14, 2001) Initial release. Trademarks Copyright © 2001 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are registered trademarks of Advanced Micro Devices, Inc. ExpressFlash is a trademark of ...