CXD2555 Intersil Corporation, CXD2555 Datasheet - Page 8

• Manufacturer Part Number: CXD2555
• Description: AD/DA Converter For Audio Application
• Manufacturer: Intersil Corporation

Master Mode/Slave Mode
(Related Pins) MS, LRCK, BCK
When using the XCS2555Q in multiple units or in a pair with
DA converters such as the CXD2558M, one of these
CXD2555Qs should be in the master mode to serve as the
source of clocks LRCK and BCK. The other CXD2555Qs are
used in the slave mode, with their clocks LRCK and BCK
supplied by the master CXD2555Q.
Crystal Oscillator Frequency Selection
(f
(Related Pins) XTLI, XTLO, XSLO, XSL1, XSL2, UNCLK,
XCLK
With XSL2 fixed High, the device can be operated with low-
f
frequency. In this case, the frequency of the crystal oscillator
can be selected by setting a combination of XSL0 and XSL1
accordingly.
AD Converter Input Level
Given the constants shown in the Test Circuit on page 7, the
AD converter input level V
is such that 4V
output. Also, the large-amplitude inputs are possible by
varying the AD converter input resistance value (R
the equation shown below to calculate this resistance value.
The AD converter generates full-scale outputs for inputs
equal to or greater than the values thus obtained.
S
S
MS
R
H
L
= 8kHz to 24kHz)
frequencies which may be 1/2 or 1/4 the normal f
IN
XSL2
= 420 • V
L
L
L
L
Master Mode
Slave Mode
P-P
IN
MODE
[RMS] - 1200 [Ω]
(1.4V
XSL1
H
H
L
L
RMS
TABLE 3.
IN
H
(operational amplifier input IN)
) is equivalent to the full-scale
MS
XSL0
(MASTER MODE)
H
H
L
L
LRCK AND BCK I/O
CXD2555Q
Output
FIGURE 37. CONNECTION EXAMPLE
Input
LRCK
BCK
HI2555, CXD2555
CRYSTAL OSCILLATOR FREQUENCY
IN
OUTPUT
OUTPUT
). Use
TABLE 4.
S
4-308
Crystal Oscillator Frequency Selection
(f
(Related Pins) XTLI, XTLO, XSLO, XSL1, XSL2, UNCLK,
XCLK
By setting a combination of XSLO and XSL1, with XSL2
fixed Low, the frequency of the external crystal oscillator
connected to XTLI and XTLO can be selected. In this case,
XCLK outputs a clock whose frequency is always 256 times
f
frequency.
When supplying the master clock fro some other external
source, not a crystal oscillator, use XTLI for this clock input
and leave XTLO open.
Example: When input level = 1.4V
S
S
, and UCLK outputs a clock that is half the crystal oscillator
R
1024f
INPUT
INPUT
INPUT
INPUT
= 32kHz to 48kHz)
256f
512f
768f
IN
L
H
H
→ 4700 [Ω]
= 4200 • 1.4 - 1200 = 4680
S
S
S
S
LRCK
BCK
LRCK
BCK
XSL2
XSL1
XSL0
FIGURE 38. CONNECTION EXAMPLE
(SLAVE MODE)
1024f
CXD2555Q
CXD2558M
XTL1
CXD2555Q
S
XTL0
UCLK
XCLK
MS
512f
256f
RMS
L
XCLK
256f
256f
256f
256f
S
S
S
S
S
S
(4V
TO EXTERNAL IC,
SUCH AS DSP
TO CXD2555Q IN
SLAVE MODE
P-P
)
UCLK
128f
256f
384f
512f
S
S
S
S