AS3910-BQFP AMSCO [austriamicrosystems AG], AS3910-BQFP Datasheet - Page 16

• Manufacturer Part Number: AS3910-BQFP
• Description: 13.56 MHz RFID Reader IC, ISO-14443 A/B
• Manufacturer: AMSCO [austriamicrosystems AG]

AS3910
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
The oscillator block always provides 13.56MHz clock signal to the rest of the IC. In case of 27.12MHz crystal clock signal is internally divided by
two. Divider is controlled by Configuration Register 2 (#02) bit osc.
Division by two assures that 13.56 MHz signal has a duty cycle of 50% which is better for the Transmitter performance (no PW distortion). Use of
27.12MHz crystal is therefore recommended for better performance.
In case of 13.56MHz crystal, the bias current of stage which is digitizing oscillator signal is increased to assure as low PW distortion as possible.
The oscillator output is also used to drive a clock signal output pin which can be used by the external microcontroller (MCU_CLK). By setting bits
in Configuration Register 2 MCU_CLK a frequency can chosen between 13.56MHz, 6.78MHz and 3.39MHz. Any microcontroller processing
generates noise which may be captured by the AS3910 receiver. Using MCU_CLK as the microcontroller clock source generates noise which is
synchronous to the reader carrier frequency and is therefore filtered out by the receiver while using some other incoherent clock source
produces noise which may generate some sideband signals captured by Receiver. Due to this fact it is recommended to use MCU_CLK as
microcontroller clock source.
8.8 Power Supply, Regulators
The AS3910 includes two regulators which can be adjusted automatically to improve the reader PSRR. VDD is an external power supply pin. It is
used to supply the logic and digital pins. One regulator is used to supply analog blocks (VSP_A), another is there just for transmitter (VSP_RF)
in order to decouple transmitter current spikes from the rest of the IC. All negative power supply pins are externally connected to the same
negative supply, the reason for separation is in decoupling of noise induced by voltage drops on the internal power supply lines. These pins are
VSS (die substrate potential), VSN_D (negative supply of logic and digital pads), VSN_A (negative supply of analog blocks) and VSN_RF
(negative supply of transmitter).
An additional regulator block provides AGD voltage (1.5V) which is used as reference potential for analog processing (analog ground).
Blocking capacitors have to be connected externally to regulator outputs and AGD pins. For pins VSP_A and VSP_RF recommended blocking
capacitors are 2.2μF in parallel with 10nF, for pin AGD 1μF in parallel with 10nF is suggested.
The regulated voltage range is from 2.4V to 3.4V with step of 100mV. Both regulators are set to the same voltage. VSP_A regulator maximum
capability is 20mA while maximum capability of VSP_RF regulator is 300mA. VSP_RF regulator also has a built in protection which limits current
to max 300mA in normal operation and to max 500 mA in case of a short.
The regulators are operating when either the Operating Control Register bit en is set or pin EN is high. In Power-down mode the regulators are
not operating, VSP_A and VSP_RF are connected to VDD through 1kΩ resistors. Connection through resistors assures smooth power up of the
system and a smooth transitions from Stand-by mode to other operating modes. In case regulators were regulating or were transparent at power
up a huge current would be pulled from VDD supply to charge blocking capacitors of regulated outputs which is especially problematic for battery
powered systems.
At power up the regulated voltage is set to maximum voltage (3.4V).
The regulator voltage can then be set automatically or “manually”. Automatic procedure is started by sending the direct command Adjust
Regulators. In this procedure regulated voltage is set 250mV below VDD. This procedure assures that reader operates with maximum possible
power while still assuring good PSRR.
Regulator operation can be controlled and observed by writing and reading two Regulator registers.
Regulator Display Register (#15) is a read only register which displays actual regulated voltage when regulator is operating. In Power-down
mode its content is forced to 00.
By writing Regulated Voltage Definition Register (#16) user chooses between automatic and “manual” adjustment of regulated voltage.
Automatic mode is chosen when bit reg_s is 0 (default and also recommended state). When bit reg_s is asserted to 1 regulated voltage is
defined by bits rege_3 to rege_1 of the same register.
8.9 Communication to External Microcontroller
The AS3910 is a slave device and the external microcontroller initiates all communication. Communication is done by a 4-wire Serial Peripheral
Interface (SPI). The AS3910 asks microcontroller for its attention by sending an interrupt (pin INTR).
In addition the microcontroller can use clock signal available on pin MCU_CLK when the oscillator is running.
The microcontroller can also drive pin EN. Putting this pin high has the same function as setting the Operation Control Register bit en (entry in
Ready mode).
www.austriamicrosystems.com/HF_RFID_Reader/AS3910
Revision 2.3
16 - 47