AS3910-BQFP AMSCO [austriamicrosystems AG], AS3910-BQFP Datasheet - Page 25

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AS3910-BQFP

Manufacturer Part Number
AS3910-BQFP
Description
13.56 MHz RFID Reader IC, ISO-14443 A/B
Manufacturer
AMSCO [austriamicrosystems AG]
Datasheet
AS3910
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
8.11.2 Configuration Registers
Table 12. Configuration Register 2
Note: Default setting is set at power up and after Set Default command.
Table 13. Configuration Register 3
Note: Default setting is set at power up and after Set Default command.
www.austriamicrosystems.com/HF_RFID_Reader/AS3910
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
no_par
p_len3
p_len2
p_len1
p_len0
Name
crc_rx
Address # 03: Configuration Register 3 (ISO-14443A and NFC)
out_cl1
out_cl0
Name
sing
envi
osc
tf2
tf1
Address # 02: Configuration Register 2
Def.
0
0
0
0
0
0
1 → receive without CRC
1 → no byte parity checking
Def.
0
0
0
0
0
0
0
p_len3
0
0
1
-
-
1 → only RFO1 driver will be used
1 → input applied to RFI1 is envelope
1 → reduces the gain for 11 dB in first stage
after peak detector
1 → reduces the gain for 6 dB in first stage after
peak detector
0 → 13.56MHz Xtal, 1 → 27.12MHz Xtal
Not used
out_cl1
p_len2
0
0
1
1
0
0
1
-
-
Function
Not used
p_len1
Function
out_cl0
0
0
1
-
-
0
1
0
1
Revision 2.3
p_len0
0
1
1
-
-
13.56 MHZ
6.78 MHZ
no output
3.39MHz
out_cl
reduction
1106ns
74ns
0
-
-
Choose between single and differential driving of
antenna.
RF envelope input
When both bits are set there is 17 dB gain
reduction in first stage
Selector for crystal oscillator
Selection of clock frequency on MCU_CLK
output. In case of “11”, MCU_CLK output is
permanently low.
For ISO-14443A anticollision.
When set to 1 parity bits are still detected
and removed before received data is put
in FIFO, but there is no check for their
correctness
Modulation pulse reduction,
Defined in number of 13.56 MHz clock
periods
Comments
type: RW
Comments
type: RW
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