74HC139N,652 NXP Semiconductors, 74HC139N,652 Datasheet - Page 2

IC DECODER/DEMUX DUAL 2-4 16DIP

74HC139N,652

Manufacturer Part Number
74HC139N,652
Description
IC DECODER/DEMUX DUAL 2-4 16DIP
Manufacturer
NXP Semiconductors
Series
74HCr
Type
Decoder/Demultiplexerr
Datasheet

Specifications of 74HC139N,652

Package / Case
16-DIP (0.300", 7.62mm)
Circuit
1 x 2:4
Independent Circuits
2
Voltage Supply Source
Single Supply
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Through Hole
Logic Family
74HC
Number Of Lines (input / Output)
6.0 / 8.0
Propagation Delay Time
11 ns
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
Through Hole
Number Of Input Lines
6.0
Number Of Output Lines
8.0
Power Dissipation
750 mW
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Output High, Low
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-1400-5
74HC139N
933669300652
Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
GND = 0 V; T
Notes
1. C
2. For HC the condition is V
APPLICATIONS
ORDERING INFORMATION
See
September 1993
t
C
C
PHL
SYMBOL
Demultiplexing capability
Two independent 2-to-4 decoders
Multifunction capability
Active LOW mutually exclusive outputs
Output capability: standard
I
Memory decoding or data-routing
Code conversion
Dual 2-to-4 line decoder/demultiplexer
I
PD
CC
f
f
C
V
For HCT the condition is V
i
o
“74HC/HCT/HCU/HCMOS Logic Package Information”
/ t
CC
PD
= input frequency in MHz
L
category: MSI
= output frequency in MHz
(C
PLH
= output load capacitance in pF
P
= supply voltage in V
is used to determine the dynamic power dissipation (P
L
D
= C
V
amb
CC
PD
propagation delay
input capacitance
power dissipation capacitance per multiplexer
2
nA
nE
= 25 C; t
V
n
3
f
o
CC
to nY
to nY
) = sum of outputs
2
n
n
f
r
i
= t
I
= GND to V
I
f
PARAMETER
= GND to V
= 6 ns
(C
L
V
CC
CC
2
CC
f
o
) where:
1.5 V
2
.
GENERAL DESCRIPTION
The 74HC/HCT139 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). It is specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT139 are high-speed, dual 2-to-4 line
decoder/multiplexers. This device has two independent
decoders, each accepting two binary weighted inputs
(nA
LOW outputs (nY
LOW enable input (nE).
When nE is HIGH, every output is forced HIGH. The
enable can be used as the data input for a 1-to-4
demultiplexer application.
The “139” is identical to the HEF4556 of the HE4000B
family.
D
C
notes 1 and 2
0
in W):
L
and nA
= 15 pF; V
CONDITIONS
1
) and providing four mutually exclusive active
CC
0
to nY3). Each decoder has an active
= 5 V
11
10
3.5
42
HC
TYPICAL
74HC/HCT139
Product specification
13
13
3.5
44
HCT
ns
ns
pF
pF
UNIT

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