CYIL1SM1300AA_09 CYPRESS [Cypress Semiconductor], CYIL1SM1300AA_09 Datasheet - Page 15

• Manufacturer Part Number: CYIL1SM1300AA_09
• Description: LUPA-1300 1.3 MPxl High Speed CMOS Image Sensor
• Manufacturer: CYPRESS [Cypress Semiconductor]

The first selected line after a Sync_y pulse is the line defined by
the y-address in the y-address register. Every select line is in
principle 1 clock period long, except for the first select line. The
first select line goes high as soon as a Sync_y pulse occurs
together with a rising edge of Clock_y. On the next rising edge
of Clock_y, the next row is selected, unless Sync_y is still active.
Document Number: 38-05711 Rev. *D
Notes
12. The applied Clock_x, is filtered on chip to remove spikes. This is especially required at these high speeds. This filtering results in an on chip Clock_x that is
13. The analog signal will come out of the sensor with a 60/40 duty cycle. Therefore, it is very important to have a very flexible ADC clock phase. This is necessary
delayed in time with about 10 nsec. In other words, the data at the output has, with respect to the external Clock_x, a propagation delay of 20 nsec. This 20 nsec
come from 10 nsec of the generation of the internal Clock_x and 10 nsec due to other on chip generated signals.
to fine-tune the ADC to sample the analog signal at the correct moment.
Figure 15. Readout Time of Line is Sum of Row Blanking Time and on Line Readout Time
a
b
c
d
Symbol
Figure 14. Timing of y Shift Register
Sync_Y
Sync_Y-Clock_Y
Clock_Y-Sync_Y
Sync_X -Clock_X
Name
In
is selected during 1 period of Clock_y.
Once a line is selected, it needs to stabilize first of all, which is
called the row blanking time, and secondly the pixels need to be
read out.
Figure
15, a short Sync_y pulse makes sure that the first row
Figure 15
> 100 nsec
> 50 nsec
> 50 nsec
> 50 ns
Value
shows the principle.
CYIL1SM1300AA
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