AK4621 AKM [Asahi Kasei Microsystems], AK4621 Datasheet - Page 32

• Manufacturer Part Number: AK4621
• Description: 24-Bit 192kHz Stereo Audio CODEC
• Manufacturer: AKM [Asahi Kasei Microsystems]

Addr
MS1258-E-01
02H
Addr
01H
RSTDA: DAC reset
RSTAD: ADC reset
SDAD: ADC Short Delay Sharp Roll Off Filter Enable
DFS1-0: Sampling Speed Control
CMODE, CKS1-0: Master Clock Frequency Select
DIF2-0: Audio data interface modes
Register Name
Clock and Format Control
0: Reset (default)
1: Normal Operation
0: Reset (default)
1: Normal Operation
000: Mode 0
001: Mode 1
010: Mode 2 (default)
011: Mode 3
100: Mode 4
Register Name
Reset Control
Default
Default
When RSTDA bit =“0”, the internal timing of DAC is reset and the AOUT becomes VCOM voltage
immediately. In this time, all registers are not initialized, and register writings are valid. After exiting the
power down mode, the OATT fades in the setting values of the control register (06H, 07H, 08H, 09H). The
analog outputs must be muted externally since a pop noise may occur when entering to and exiting from
this mode.
In this time, all registers are not initialized, and register writings are valid. After exiting the power down
mode, the ADCs output “0” during first 516 LRCK cycles.
Default: Disable
Default: Normal speed
Default: 256fs
Default: 24bit MSB justified for both ADC and DAC
When RSTAD bit =“0”, the internal timing of ADC is reset and the SDTO pin becomes “L” immediately.
DIF2
D7
D7
(Table
0
0
0
(Table
1)
DIF1
8)
D6
D6
0
0
1
- 32 -
(Table
DIF0
D5
D5
0
0
(Table
0
2)
15)
SDAD
CMODE
D4
D4
0
0
CKS1
D3
0
0
D3
0
CKS0
D2
0
0
D2
0
RSTAD
DFS1
D1
D1
0
0
[AK4621]
RSTDA
2011/01
DFS0
D0
0
D0
0