AK4122VQ ETC [List of Unclassifed Manufacturers], AK4122VQ Datasheet - Page 22
AK4122VQ
Manufacturer Part Number
AK4122VQ
Description
24 BIT 96KHZ SRC WITH DIR
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet
1.AK4122VQ.pdf
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ASAHI KASEI
Soft mute operation is performed in the digital domain of the SRC output. Soft mute can be controlled by SMUTE bit or
SMUTE pin. The SMUTE bit and SMUTE pin are ORed between pin and register. When SMUTE bit goes “1” or
SMUTE pin goes “H”, the SRC output data is attenuated by −∞ within 1024 LRCK cycles. When the SMUTE bit returned
“0” and SMUTE pin goes “L” the mute is cancelled and the output attenuation gradually changes to 0dB during 1024
LRCK cycles. If the soft mute is cancelled before mute state after starting of the operation, the attenuation is discontinued
and returned to 0dB by the same cycles. The soft mute is effective for changing the signal source.
(1) The output data is attenuated by −∞ during 1024 LRCK cycles (1024/fs).
(2) Digital output delay from the digital input is called the group delay (GD).
(3) If the soft mute is cancelled before attenuating to −∞ after starting the operation, the attenuation is discontinued and
MS0267-E-03
SM U T E
Attenuation
SD T IO / SD T O
Soft Mute Operation
returned to 0dB by the same number of clock cycles.
D AT T Level
-∞
(1)
Figure 12. Soft Mute Function
- 22 -
G D
(2)
G D
(3)
[AK4122]
2004/08
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