AK4122VQ ETC [List of Unclassifed Manufacturers], AK4122VQ Datasheet - Page 25
AK4122VQ
Manufacturer Part Number
AK4122VQ
Description
24 BIT 96KHZ SRC WITH DIR
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet
1.AK4122VQ.pdf
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ASAHI KASEI
The on-chip, low jitter PLL of DIR has a wide lock range of 32kHz to 96kHz and a lock time of less than 20ms. The
AK4122 has a sampling frequency detect function (32kHz, 44.1kHz, 48kHz, 88.2kHz, 96kHz) that uses either clock
comparison against the MCLK2 or OMCLK frequency or the channel status information. The PLL loses lock when the
received sync interval is incorrect.
Four receiver inputs (RX1-4) of DIR are available. Each input includes an amplifier for unbalance loads that can accept
200mVpp or greater signal. The IPS1-0 bits select the receiver channel (Table 14).
The AK4122 can output the through data from the digital receiver inputs (RX1-4) to the TX pin. The OPS1-0 bits can
select the source of the output from the TX pin. TX output can be stopped by TXE bit. AK4122 does not have the TX
output buffer (Line Driver), the TX pin cannot drive the 75Ω coaxial cable directly.
MS0267-E-03
96kHz Clock Recovery
Biphase Input
Biphase Output
IPS1
OPS1
0
0
1
1
0
0
1
1
Table 15. Output Data Select for TX
Table 14. Recovery Data Select
IPS0
OPS0
0
1
0
1
0
1
0
1
- 25 -
Output Data
Input Data
RX1
RX2
RX3
RX4
RX1
RX2
RX3
RX4
Default
Default
[AK4122]
2004/08
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