AK4646EN AKM [Asahi Kasei Microsystems], AK4646EN Datasheet - Page 69

• Manufacturer Part Number: AK4646EN
• Description: Stereo CODEC with MIC/SPK-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

MS0557-E-02
Power Supply
PMVCM bit
(Addr:00H, D6)
(Addr:01H, D1)
(Addr:01H, D0)
PMPLL bit
MCKO pin
3. PLL Slave Mode (MCKI pin)
<Example>
MCKO bit
LRCK pin
MCKI pin
BICK pin
PDN pin
(1) After Power Up: PDN pin “L”
(2) DIF1-0, PLL3-0, FS3-0, BCKO and M/S bits should be set during this period.
(3) Power Up VCOM: PMVCM bit = “0”
(4) Enable MCKO output: MCKO bit = “1”
(5) PLL starts after that the PMPLL bit changes from “0” to “1” and PLL reference clock (MCKI pin) is supplied.
(6) The normal clock is output from MCKO after PLL is locked.
(7) The invalid frequency is output from MCKO during this period.
(8) BICK and LRCK clocks should be synchronized with MCKO clock.
“L” time of 150ns or more is needed to reset the AK4646.
VCOM should first be powered up before the other block operates.
PLL lock time is 40ms (max).
(1)
(2)
(3)
(4)
(5)
40msec(max)
Figure 40. Clock Set Up Sequence (3)
“H”
(7)
Input
“1”
(6)
(8)
- 69 -
Output
Input
Example:
(1) Power Supply & PDN pin = “L”
Input Master Clock Select at PLL Mode: 11.2896MHz
BICK frequency at Master Mode: 64fs
Audio I/F Format: MSB justified (ADC & DAC)
MCKO: Enable
BICK and LRCK input start
(2)Addr:04H, Data:4AH
(3)Addr:00H, Data:40H
(4)Addr:01H, Data:03H
MCKO output start
Addr:05H, Data:27H
[AK4646]
“H”
2007/05