AK4647VN AKM [Asahi Kasei Microsystems], AK4647VN Datasheet - Page 51

• Manufacturer Part Number: AK4647VN
• Description: Stereo CODEC with MIC/HP-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
MS0566-E-00
Addr
00H
Register Definitions
PMADL: MIC-Amp Lch and ADC Lch Power Management
PMDAC: DAC Power Management
PMLO: Stereo Line Out Power Management
PMBP: Mono Input Power Management
PMVCM: VCOM Power Management
Each block can be powered-down respectively by writing “0” in each bit of this address. When the PDN pin is “L”, all
blocks are powered-down regardless as setting of this address. In this case, register is initialized to the default value.
When all power management bits are “0” in the 00H, 01H, 02H, 10H and 20H addresses and MCKO bit is “0”, all
blocks are powered-down. The register values remain unchanged. Power supply current is 20μA(typ) in this case. For
fully shut down (typ. 1μA), PDN pin should be “L”.
When neither ADC nor DAC are used, external clocks may not be present. When ADC or DAC is used, external clocks
must always be present.
0: Power-down (Default)
1: Power-up
0: Power-down (Default)
1: Power-up
0: Power-down (Default)
1: Power-up
0: Power-down (Default)
1: Power-up
0: Power-down (Default)
1: Power-up
Register Name
Power Management 1
Both PMDAC and PMBP bits should be set to “1” when DAC is powered-up for playback.
When the PMADL or PMADR bit is changed from “0” to “1”, the initialization cycle (1059/fs=24ms
@44.1kHz) starts. After initializing, digital data of the ADC is output.
When any blocks are powered-up, the PMVCM bit must be set to “1”. PMVCM bit can be set to “0” only
when all power management bits of 00H, 01H, 02H, 10H, 20H and MCKO bits are “0”.
Default
D7
0
0
PMVCM
D6
0
PMBP
- 51 -
D5
0
D4
0
0
PMLO
D3
0
PMDAC
D2
0
D1
0
0
[AK4647]
PMADL
2006/11
D0
0