AK4160 AKM [Asahi Kasei Microsystems], AK4160 Datasheet
AK4160
Related parts for AK4160
AK4160 Summary of contents
Page 1
... The AK4160 is a low operating voltage and low power consumption 16-channel capacitive touch sensor. Maximum 8 channels out of the 16-channel can be configured to LED drive or GPIO. The AK4160 has a channel independent automatic correct function of environmental drifts for each sense input. It reduces false detection by continuous calibration of the internal reference value in the situation when the input capacitance of the touch switch is changed by the external factors such as hydrothermal conditions ...
Page 2
... Interface AD0 AD1 Clock IRQ0N / GPIOA IRQ1N / IRQ GPIOB Output IRQ2N / GPIOC ■ Ordering Guide −40 ∼ +85°C AK4160EN AKD4160 AK4160EN Evaluation Board MS1313-E-01 RREF Current Sources Auto Calibration LED Driver PWM Logic Control & Register GPIO Logic Data SAR Filter ADC Figure 1 ...
Page 3
... Pin Layout CS10 / GPIO5 CS11 / GPIO4 CS12 / GPIO3 CS13 / GPIO2 CS14 / GPIO1 CS15 / GPIO0 VDD MS1313-E- AK4160EN 24 25 Top View [AK4160 CS2 13 CS1 12 CS0 11 RREF 10 VSS 9 VREG 8 RSTN 7 2011/11 ...
Page 4
... This pin must be open. This pin must be configured with internal pull-down resistor or be connected to VSS Reset State Function RSTN pin = “L” Hi-z (Input) Hi-z (Input) Hi-z (Input) Hi-z (Input) Hi-z (Open) Hi-z (Open) Hi-z (Input) Hi-z (Input) Hi-z (Input) Hi-z (Input) Hi-z (Input) Hi-z (Input) Hi-z (Input) Hi-z (Input) Setting [AK4160 Output - (Note 5) - 2011/11 ...
Page 5
... Note 6. All voltages with respect to ground. WARNING: AKM assumes no responsibility for the usage beyond the conditions in this datasheet. MS1313-E-01 ABSOLUTE MAXIMUM RATINGS Symbol Min VDD -0.3 IIN Isource Isink VIN -0.3 Ta -40 Tstg -65 Symbol min VDD 1. [AK4160] max 4.3 ± 1.2 VDD+0.3 or 4.3 85 150 typ max 1.8 3.6 Unit ° ...
Page 6
... Setting) IPD - 6 - min typ max - 0 3 min typ max -1.0 - 1.0 0.7xVDD - - - - 0.3xVDD VDD-0 VDD-0 0 0.5 VDD-0 VDD 200 -200 - -5 [AK4160] Unit Bits % Unit 2011/11 ...
Page 7
... Note 16. Variation against nominal value of TCHG (0.25us to 32us) Note 17. Variation against nominal value of TSR (4ms to 512ms) Note 18. The AK4160 can be reset by the RSTN pin = “L”. This is to initialize the AK4160 for sure. Note 19. Pulse width of spike noise suppressed by input filter of the RSTN pin. ...
Page 8
... VDD 0.0 V 1.00V VREG I2CI/F tPR SDA tBUF tLOW SCL tHD:STA Stop Start MS1313-E-01 Enable tPU Figure 3. Power up Timing Diagram tR tHIGH tF tHD:DAT tSU:DAT tSU:STA Start 2 Figure Interface Timing Diagram - 8 - [AK4160] tPI VIH VIL tSP VIH VIL tSU:STO Stop 2011/11 ...
Page 9
... C is increased touching the touch switch comparing with the not touched status. After the voltage is charged, the AK4160 discharges the sense terminal by a direct current I, during T period. At the same time, the ADC converts the terminal value. The sense terminal must be connected to ground before the next measurement. The next measurement should be started when the sense terminal is discharged completely ...
Page 10
... CS0 Data CS1 Data Figure 7. The Measurement of a Sense Terminal and The Data Update MS1313-E-01 Calculation of median averaging after 6 measurement, repeating charge and discharge. (6 Sample Setting in the first filter) (4 Sample Setting in the second filter [AK4160] Result Update 2011/11 ...
Page 11
... The Capacitance of a sense terminal is influenced from the hydrothermal condition and the grime of the surface. The AK4160 monitors the measurement value continuously. If the value is changed by the environment, “The Noncontact Reference Value” is corrected. The reference value is charged very slowly following the measurement value of not touched status by the correction circuit ...
Page 12
... The unused pin of IRQ pins can simply be configured as a GPIO pin. ■ Multi Touch The AK4160 supports multi touch operation. The multi touch function can be controlled, improving operability of an application by enabling and disabling. · Multi Touch Enabled The status register reflects a touch detection of each sense terminal directly. Update of the status register is independent for each sense terminal. The state of a sense terminal is not influenced by the state of other sense terminals. · ...
Page 13
... IRQ Interrupt Permitted or Not Permitted 4. IRQ Interrupt Edge Select (“↑” or “↓”) The AK4160 monitors terminal level in every 31.25us by the debounce function. When the input levels are the same for selected number of times continuously, the AK4160 reflects input value. ...
Page 14
... The AK4160 can perform more than one byte write operation per sequence. After receipt of the third byte the AK4160 generates an acknowledge and awaits the next data. The master can transmit more than one byte instead of terminating the write cycle after the first data byte is transferred. After receiving each data packet the internal 6-bit address counter is incremented by one, and the next data is automatically taken into the next address. If the address exceeds “ ...
Page 15
... Figure 13. Byte Structure after the second byte Figure 14. START and STOP Conditions 2 1 Figure 15. Acknowledge on the Data (n+ C-bus Mode AD1 AD0 R stop condition not acknowledge acknowledge 8 9 clock pulse for acknowledgement 2 C-Bus [AK4160] 2011/11 ...
Page 16
... After the register address is acknowledged, the master immediately reissues the start request and the slave address with the R/W bit “1”. The AK4160 then generates an acknowledge, 1 byte of data and increments the internal address counter the master does not generate an acknowledge but generates stop condition instead, the AK4160 ceases transmission ...
Page 17
... RT10 R8X10 RT10[6] RT10[5] TT11 T8X11 TT11[6] TT11[5] RT11 R8X11 RT11[6] RT11[5] TT12 T8X12 TT12[6] TT12[5] RT12 R8X12 RT12[6] RT12[5] TT13 T8X13 TT13[6] TT13[5] Table 2. AK4160 Register Map ( Fields TS[12] TS[11] TS[10] TS[9] TS[4] TS[3] TS[2] TS[1] ACF RANGE GPIN Reserved Reserved Reserved IRQ2 IRQ1 GPIN[4] ...
Page 18
... Reserved Reserved - Reserved Reserved Reserved - Reserved Reserved Reserved - Reserved Reserved Reserved SRST SRST[7] SRST[6] SRST[5] - Reserved Reserved Reserved Table 3. AK4160 Register Map ( Fields RT13[4] RT13[3] RT13[2] RT13[1] TT14[4] TT14[3] TT14[2] TT14[1] RT14[4] RT14[3] RT14[2] RT14[1] TT15[4] TT15[3] TT15[2] ...
Page 19
... Reserved Reserved Reserved REF13[7] REF13[6] REF13[5] REF14 Reserved Reserved Reserved REF14[7] REF14[6] REF14[5] REF15 Reserved Reserved Reserved REF15[7] REF15[6] REF15[5] Table 4. AK4160 Register Map ( Fields Reserved Reserved Reserved REF0[9] REF0[4] REF0[3] REF0[2] REF0[1] Reserved Reserved Reserved REF1[9] REF1[4] ...
Page 20
... When the automatic resetting or the range over interrupt is invalid, the bit is fix to “0”. The GPIN bit is set to “1” when a GPIO Input Interrupt occurs. When the GPIO input interrupt is invalid, the bit is fix to “0” [AK4160 ...
Page 21
... Short Detection of the RREF pin The IOVER bit is set to “1”, when the RREF pin is shorted to VSS in run mode. The AK4160 is changed from run mode to shutdown mode for the over current protection. The IRQ bit setting to the edge action is fix to the active state. When the IOVER bit is “ ...
Page 22
... D5 D4 GPIN[6] GPIN[5] GPIN[4] Description Debounce SRC1-0 bits The Value that returned from GPIO (Note 25) (Note 26 Invalid - Valid - - 00 - 01, 10, 11 Table 5. GPIO Register Value - 22 - [AK4160 GPIN[3] GPIN[2] GPIN[1] GPIN[0] (Table 5) 0 Terminal Level Debounced Level Terminal Level Output Enable D0 2011/11 ...
Page 23
... CS8 0x07 - 0x08 CS9 0x09 - 0x0A CS10 0x0B - 0x0C CS11 0x0D - 0x0E CS12 0x0F - 0x10 CS13 0x11 - 0x12 CS14 0x13 - 0x14 CS15 Table 6. Address to each CS pins - 23 - [AK4160 CSDn[11] CSDn[10] CSDn[9] CSDn[ CSDn[3] CSDn[2] CSDn[1] CSDn[0] Address 0x15 - 0x16 0x17 - 0x18 ...
Page 24
... CS15 Threshold Register - TTn[3] TTn[2] TTn[ RTn[3] RTn[2] RTn[1] GPIO - - - - - - - - GPIO7 Control Register GPIO6 Control Register GPIO5 Control Register GPIO4 Control Register GPIO3 Control Register GPIO2 Control Register GPIO1 Control Register GPIO0 Control Register [AK4160] D0 TTn[0] D0 RTn[0] 2011/11 ...
Page 25
... DEB0[3] DEB0[2] DEB0[1] times in a row with 31.25us of the sampling (Table 8) times in a row with 31.25us of the sampling (Table 8) Consecutive Consecutive number time (ms) 512 1024 2048 4096 8192 16384 32768 32768 [AK4160 DEB0[ 128 256 512 1024 1024 2011/11 ...
Page 26
... Low Side Output: When Output is “H”, Hi-z (Open Drain) 10: High Side Output: When Output is “L”, Hi-z (Open Drain) 11: CMOS Output (Same as 00 Setting) 0: 1/3 drive 1: full drive Description 00: 125Hz 01: 250Hz 10: 500Hz 11: 1000Hz Duty=(DUTY + 1) / 32: 1/32 ~ 32/ [AK4160 DRV[1] DRV[0] INV DSTR DUTY[3] ...
Page 27
... GPDT7-0 bits = “1” GPEN[6] GPEN[5] GPEN[4] Description Exclusive control is provided for the sense terminal select (SCC Register NCH bit). When a pin has already been selected as GPIO, the sense terminal selection is invalid [AK4160 CCn[3] CCn[2] CCn[1] CCn[ Reserved ...
Page 28
... VDD ≥ 2.1V 1.90V VDD ≥ 2.3V 2.10V VDD ≥ 2.5V 2.30V VDD ≥ 2.7V 2.50V VDD ≥ 2.9V 2.70V VDD ≥ 3.1V 2.90V VDD ≥ 3.3V 3.10V VDD ≥ 3.5V 3.30V Table 9. Reference Value of Automatic Setting - 28 - [AK4160 VS[3] VS[2] VS[1] VS[0] Setting Voltage Reserved 1.35V 1.53V 1.71V 1.89V 2.07V 2.25V 2.43V 2 ...
Page 29
... D5 D4 MTI[6] MTI[5] MTI[4] Description Sense terminals to prohibit the multi touch function are selected by these bits. The operational mode without the multi touch function is controlled by RCH bit and LCH bit of address “0x70” [AK4160 ACS[11] ACS[10] ACS[9] ACS[ ...
Page 30
... Low Side Output: When Output is “H”, Hi-z (Open Drain) 10: High Side Output: When Output is “L”, Hi-z (Open Drain) 11: CMOS Output (Same as 00 Setting) 0: 1/3 drive 1: full drive 0: Invalid 1: Valid. The direction is fixed by PU bit. 0: Pull-down 1: Pull- [AK4160 DRV[0] DSTR ...
Page 31
... The other interrupt factor cannot be selected. The polarity setting, driver setting, and etc. are configured by Addr 0x65/0x69/0x6D. The status cannot be cleared unlike the edge operation. The IRQ Status (IRQ2-0 bit of Addr 0x03) returns the input level of the IRQ pin [AK4160] 2011/11 ...
Page 32
... Low Side Output: When Output is “H”, Hi-z (Open Drain) 10: High Side Output: When Output is “L”, Hi-z (Open Drain) 11: CMOS Output (Same as 00 Setting) 0: 1/3 drive 1: full drive 0: Invalid 1: Valid. The direction is fixed by PU bit. 0: Pull-down 1: Pull-up Description - 32 - [AK4160 DRV[0] DSTR ...
Page 33
... The sense terminal to touch most strongly is selected. 1: The sense terminal of the youngest number is selected. 0: The next touch judgment is not executed until all the sense terminals are released once. 1: When the sense terminal that is judged as touched is released, the next touch judgment is executed [AK4160 IRQM[11] IRQM[10] ...
Page 34
... Output Rate = Sampling Rate × NF2S (Addr 0x70) reference = reference – (reference – measurement) / (2^(EUR+1)), (EUR = 0~3) Description Operation at Each “Output Rate × (1+EDP)”, (EDP = 0~63) Output Rate = Sampling Rate × NF2S (Addr 0x70) reference = reference – (reference – measurement) / (2^(EDR+1)), (EDR = 0~ [AK4160 DEBR[3] DEBR[2] ...
Page 35
... CS0 ~ CS2 01100 CS0 ~ CS3 01101 CS0 ~ CS4 01110 CS0 ~ CS5 01111 CS0 ~ CS6 10000 - 11111 CS0 ~ CS7 Table 10. Sense Setting Terminal - 35 - [AK4160 NCH[3] NCH[2] NCH[1] NCH[0] Sense Setting Terminal CS0 ~ CS8 CS0 ~ CS9 CS0 ~ CS10 CS0 ~ CS11 CS0 ~ CS12 ...
Page 36
... SRST[6] SRST[5] SRST[4] Description All registers become the initial values. This register is read as “0x00” Reserved Reserved Reserved REFn[6] REFn[5] REFn[4] Description - 36 - [AK4160 SRST[3] SRST[2] SRST[1] SRST[ Reserved Reserved REFn[9] REFn[ ...
Page 37
... These figures are the connection diagram when the AD0 pin = “L” and the AD1 pin = “L”. In case of the AD0 pin = “H” or the AD1 pin = “H”, their pin must be connected to VDD. - VSS of the AK4160 should be distributed separately from the ground of external controllers. - All digital input pins (SCL, SDA, AD0, AD1, RSTN pins) must not be left floating. ...
Page 38
... Package & Lead frame material Package molding compound: Epoxy Resin, Halogen (Br, Cl) Free Lead frame material: Cu Alloy Lead frame surface treatment: Solder Plate MS1313-E-01 PACKAGE 0.75±0. 0.05MAX 0.18±0. [AK4160] Bottom View 2.30±0. 0.07 M 2011/11 ...
Page 39
... MS1313-E-01 MARKING 4160 XXXX Date Code: XXXX (4 digits) Pin #1 indication - 39 - [AK4160] 2011/11 ...
Page 40
... Output Rate/(1+EUP) → Output Rate×(1+EUP) Operation interval expression (EDP) was changed: Output Rate/(1+EDP) → Output Rate×(1+EDP) IMPORTANT NOTICE , and AKM assumes no responsibility for such use, except for the use Note2 [AK4160] in any safety, life support, or Note1) 2011/11 ...