AK4687 AKM [Asahi Kasei Microsystems], AK4687 Datasheet - Page 23

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AK4687

Manufacturer Part Number
AK4687
Description
Asynchronous Stereo CODEC with Capless Stereo Selector
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
AK4687EQ
Manufacturer:
AKM
Quantity:
20 000
Notes:
MS1307-E-00
(1) The PDN1 and PDN2 pins should be changed from “L” to “H” after power up.
(2) Charge Pump Circuit Power-up:
(3) The analog block of ADC is initialized after exiting the power-down state. timeA=528/fs
(4) The analog block of DAC is initialized after exiting the power-down state.
(6) ADC outputs “0” data in power-down state.
(7) Charge Pump Circuit Power-down
(5) Digital outputs corresponding to analog inputs and analog outputs corresponding to digital inputs have group delay
(8) It takes 2048/fs for VREF1 stabilization after charge pump is powered-up.
(9) It takes approximately 5msec (typ) until VREF1/2 rises up after power-down mode of ADC/DAC is released.
(GD).
“L” time of 150ns or more is needed to reset the AK4687. The PDN pins must be held to “L” until all power supply
pins are fed. After all powers are risen up, the PDN1 and PDN2 pins should be set to “H”.
When MCLK1/2, BICK1/2 and LRCK1/2 are input after the PDN1/2 pin = “L” → “H”, the voltage on the CVEE
pin rises to CVEE voltage approximately in 1.3msec@48kHz.
In case of connecting a 1µF to the VREF2 pin, timeB is shown below.
Inputting D/A data becomes available after the timeB period.
(PDN1 pin = “H”→“L” or No MCLK1, BICK1 and LRCK1 inputs) and (PDN2 pin = “H”→“L” or No MCLK2,
BICK2 and LRCK2 inputs)
The CVEE pin becomes 0V according to a flying capacitor and internal resistor. The internal resister is 50kΩ
(typ). Therefore, when the CVEE pin has a flying capacitor of 1µF, the time constant is 50msec (typ).
Note: If the PWAD and PWDA bits are set to “1”, or PDN1 and PDN2 pins are set “H” → “L” when the
timeB= 6/fs x 8 x 2: Normal Speed Mode
timeB=12/fs x 8 2: Double Speed Modd
timeB= 24/fs x 8 x 2 Quatruple Speed Mode
charge-pump is power-on, ADC and DAC are initialized after the charge-pump circuit is powered-on.
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[AK4687]
2011/05

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