ZL30100QDC ZARLINK [Zarlink Semiconductor Inc], ZL30100QDC Datasheet - Page 2
ZL30100QDC
Manufacturer Part Number
ZL30100QDC
Description
T1/E1 System Synchronizer
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL30100QDC.pdf
(34 pages)
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ZL30100
Data Sheet
Description
The ZL30100 T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing
and synchronization for multi-trunk T1 and E1 transmission equipment.
The ZL30100 generates ST-BUS and other TDM clock and framing signals that are phase locked to one of two
input references. It helps ensure system reliability by monitoring its references for accuracy and stability and by
maintaining stable output clocks during reference switching operations and during short periods when a
reference is unavailable.
The ZL30100 is intended to be the central timing and synchronization resource for network equipment that
complies with Telcordia, ETSI, ITU-T and ANSI network specifications.
2
Zarlink Semiconductor Inc.