ZL30108LDE1 ZARLINK [Zarlink Semiconductor Inc], ZL30108LDE1 Datasheet - Page 15

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ZL30108LDE1

Manufacturer Part Number
ZL30108LDE1
Description
SONET/SDH Network Interface DPLL
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet

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If the current reference experiences an disruption while the device is in Normal mode, the device will go
automatically into Automatic Holdover mode. It will return to Normal mode as soon as the reference is valid again.
If the reference selection changes because the value of the REF_SEL pin change the ZL30108 goes into Automatic
Holdover mode and returns to Normal mode through the TIE correction state.
Automatic Holdover Mode
Automatic Holdover mode is typically used for short durations while system synchronization is temporarily
disrupted.
In Automatic Holdover mode, the ZL30108 provides timing and synchronization signals, which are not locked to an
external reference signal, but are based on storage techniques. The storage value is determined while the device is
in Normal Mode and locked to an external reference signal.
When in Normal Mode, and locked to the input reference signal, a numerical value corresponding to the ZL30108
output reference frequency is stored alternately in two memory locations every 26 ms. When the device is switched
into Automatic Holdover mode, the value in memory from between 26 ms and 52 ms is used to set the output
frequency of the device. The frequency accuracy of Automatic Holdover mode is 0.01 ppm.
Two factors affect the accuracy of Automatic Holdover mode. One is drift on the master clock while in Automatic
Holdover mode, drift on the master clock directly affects the Automatic Holdover mode accuracy. Note that the
absolute master clock (OSCi) accuracy does not affect Holdover accuracy, only the change in OSCi accuracy while
in Holdover. For example, a
±
offset (over the 0.01 ppm) in frequency accuracy of
ZL30108. The other factor affecting the accuracy is large jitter on the reference input prior (26 ms to 52 ms) to the
mode switch.
10 °C change in temperature, while the ZL30108 is in the Automatic Holdover mode may result in an additional
REF_DIS=1: Current selected reference disrupted (see Figure 3)
REF_CH= 1: Reference change, a transition in the reference selection (a change in the
REF_SEL pin).
RST
±
32 ppm master clock may have a temperature coefficient of
REF_DIS=0 and
REF_CH=0
Holdover
Figure 9 - Mode Switching in Normal Mode
Zarlink Semiconductor Inc.
(REF_DIS=0) or
ZL30108
REF_DIS=1
±
15
REF_DIS=1
1 ppm, which is much greater than the 0.01 ppm of the
(locked)
REF_DIS=0
REF_CH=1
Normal
REF_CH=1
TIE Correction
±
0.1 ppm per °C. So a
Data Sheet

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