HTRC11001T/02EE NXP [NXP Semiconductors], HTRC11001T/02EE Datasheet - Page 7
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HTRC11001T/02EE
Manufacturer Part Number
HTRC11001T/02EE
Description
HITAG reader chip
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.HTRC11001T02EE.pdf
(22 pages)
NXP Semiconductors
037031
Product data sheet
PUBLIC
Fig 4.
Serial signaling
9.7 Serial interface
9.8 Glitch filter for increased noise/interference immunity
The communication between the HTRC110 and the microcontroller is done via a three
wire digital interface. The interface is operated by the following signals:
SCLK
DIN
DOUT
SCLK and DIN are realized as Schmitt-Trigger inputs. DOUT is an open drain output with
internal pull-up resistor.
Every communication between HTRC110 and microcontroller begins with an initialization
of the serial interface. The interface initialization condition is a low-to-high transition of the
signal DIN while SCLK is high.
All commands are transmitted to the HTRC110 serial interface starting with Most
Significant Bit (MSB). DIN and DOUT are valid when SCLK is high.
Connecting pin 5 (MODE) to VDD enables digital filtering of the SCLK and the DIN input
signals. This mode offers improved immunity against glitches on these interface signals. It
is intended to be used in the so called "Active Antenna Applications" where the
microcontroller and the reader communicate via long signal lines (e.g. 1 meter).
In other applications pin 5 (MODE) has to be connected to GND.
Please refer to the HTRC110 application note
feature.
All information provided in this document is subject to legal disclaimers.
clock
data input
data output
Rev. 3.1 — 9 February 2010
037031
(Ref.
1) for a detailed description of this
HTRC110
HITAG reader chip
© NXP B.V. 2010. All rights reserved.
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