AM79C864AKCW AMD [Advanced Micro Devices], AM79C864AKCW Datasheet - Page 19

• Manufacturer Part Number: AM79C864AKCW
• Description: Physical Layer Controller With Scrambler (PLC-S)
• Manufacturer: AMD [Advanced Micro Devices]

06–05 PC_LOOP
Bit
07
04
03
02
Name
CLASS_S
PC_JOIN
LONG
PC_MAINT
Definition
When CLASS_S is set, signifying that the PHY is a single attach station, the station will
not be bypassed before the PCM gets to the ACTIVE state. Note that this bit has effect
when the PCM is in normal operation. When the PCM is in the MAINT state, the
REQ_SCRUB and SC_BYPASS bits in the PLC_CNTRL_A register control the
bypass operation. This bit can only be changed when the PCM is in the OFF state. If
this bit is written when the PCM is in any other state, the change will be ignored.
PC_LOOP controls the loopback used in the Link Confidence Test (LCT). When it is
set to a value other than zero and the PCM is in the NEXT state, the PCM will perform
the LCT in one of three ways. The following table describes the action taken according
to the value of the two bits:
PC_LOOP
00
01
10
11
PC_LOOP should only be written after the PCM_CODE interrupt has been generated.
If the PCM is not in the NEXT state, or if PCM_SIGNALING is set, then any value
written to this field will be ignored. Once PC_LOOP has been written, it must be
cleared and then written again to perform another LCT.
When PC_JOIN is set and the PCM is in the NEXT state, the PCM will transition to the
JOIN state and the PCM join sequence will be started. PC_JOIN should only be written
after the PCM_CODE interrupt has been generated. If the PCM is not in the NEXT
state or if PCM_SIGNALING is set, then any value written to this field will be ignored.
After this bit is set, it must be cleared and then set again to cause another transition
from the NEXT state to the JOIN state. Note that if PC_JOIN is set after the LCT has
been started but before it has completed, then the LCT will be aborted and the PCM join
sequence started.
When LONG is set, the PCM will perform a long LCT; that is, it will continue the test until the
processor issues a PC_SIGNAL (i.e., a write to XMIT_VECTOR register), PC_JOIN, or other
command. Otherwise it will perform a LCT, that is, it will stop the test after the length of time
indicated in the LC_LENGTH register. In either case LCT will stop whenever Master Line State
or Halt Line State is detected, indicating that the neighboring station has completed its
LCT and has started signaling.
When PC_MAINT is set, the PCM state machine transitions to the MAINT state if it is
currently in the OFF state. If the PCM is not in the OFF state when this bit is written, and
subsequently transitions to the OFF state, it will immediately transition to the MAINT
state.
Table 3. PLC_CNTRL_B (continued)
P R E L I M I N A R Y
Am79C864A
Description
No LCT is performed
The PCM asserts Transmit PDR. This assumes that Protocol
Data Units (PDUs) will be input at TX(9–0).
The PCM asserts Transmit Idle. This causes the PLC-S to source
Idle symbols.
The PCM asserts Transmit PDR and sets up a remote loopback
path in the PLC-S.
AMD
3-21